Anybody know if a port of Xilinx's Linux/FreeRTOS Asymmetric Multi-Processing (AMP) reference design is in the works for the ZedBoard?
Thanks!
Anybody know if a port of Xilinx's Linux/FreeRTOS Asymmetric Multi-Processing (AMP) reference design is in the works for the ZedBoard?
Thanks!
there is a FreeRTTOS port for Zynq on the site, but for the ZC702. with a little effort it will work for the Zedboard.
http://www.freertos.org/Interactive_Frames/Open_Frames.html?http://interactive.freertos.org/home
Linux Ubuntu is well documented on this forum and the community designs.
I am looking into getting the ASMP going. I have seen a PetaLinux/FreeRTOS app again for ZC702, by Xilinx/PetaLinux and missinglinkelectronics.
I will check their websites.
I also would welcome some informsation on how to set up the ASMP for ZedBoard.
thanks.
there is a FreeRTTOS port for Zynq on the site, but for the ZC702. with a little effort it will work for the Zedboard.
http://www.freertos.org/Interactive_Frames/Open_Frames.html?http://interactive.freertos.org/home
Linux Ubuntu is well documented on this forum and the community designs.
I am looking into getting the ASMP going. I have seen a PetaLinux/FreeRTOS app again for ZC702, by Xilinx/PetaLinux and missinglinkelectronics.
I will check their websites.
I also would welcome some informsation on how to set up the ASMP for ZedBoard.
thanks.
Hi,
See this post on Xilinx forum:
http://forums.xilinx.com/t5/7-Series-FPGAs/where-is-pre-canned-AMP-solution-Linux-FreeRTOS/td-p/259490
In it, I have posted link to AMP Linux/FreeRTOS
project for ZC702 board. Not sure what changes are
needed to make it work on ZedBoard.
Regards,
Pramod Ranade
hi pramod,
you are probably aware that mcdougal released his work in an app note. here's a link, everyone.
http://www.xilinx.com/support/documentation/application_notes/xapp1078-amp-linux-bare-metal.pdf
what you can do in baremetal, you can do with FreeRTOS as it is done the same with inclusion of the extra API and BSP.
as you had done, pramod!
a good start on an linux high end with network interface to the world (sockets?), with FreeRTOS low end doing real time reactive controls.
what do you know about xilinx petalinux use of rpmsg/remoteproc for the inter-ARM communication of the two cores?
Hi Pramod,
After porting APP 1078 to the ZedBoard,
http://zedboard.org/comment/1961#comment-1961
I changed the baremetal in CPU1 to FreeRTOS.
I first copied the AMP modified standalone, standalone_amp_v3_07_a to C:Xilinx14.3ISE_DSEDKswlibbsp.
Next I modified the version defined for the parameter standalone_version in the file <Xilinx_Zynq>/sw/repo/freertos_zynq_v1_01_a/data/freertos_zynq_v2_1_0.tcl and version against DEPENDS option in the file <Xilinx_Zynq>/sw/repo/freertos_zynq_v1_01_a/data/freertos_zynq_v2_1_0.mld to the AMP standalone.
Then when I defined the bsp for the cpu1 app, I used the modified FreeRTOS library, and got both the AMP standalone and the FreeRTOS libraries.
Next I modified app_cpu1 main to create tasks for the old app_cpu1 main and also for the FreeRTOS hello and goodbye tasks (modifed for 3 iterations)
When I booted the new boot.bin and ran the new app_cpu1 via "/mnt/rwmem.elf 0xfffffff0 0x18000000,", I got the 3 hello's and goodbyes (throught the OCM).
And the old app_cpu1 task performed as before.
So now I have a good baseline for multi-threaded AMP with linux and FreeRTOS. The OCM seems a good way to communicate data besides these simple communications. Now recalling the Zynq-7000 Example Design - Cache coherent CDMA transfers from block RAM to OCM,
http://www.xilinx.com/support/answers/50826.htm
I can consider using this platform to design access from linux ethernet to OCM to Block Ram for a PL accelerator and then return circuit. Sounds pretty slick, but Can I do it?
I have linux AND FreeRTOS multitask build working. Today I added a PL custom accelerator and got that going from one of the FREERTOS tasks. The bit file uses 57% of the LUTS but it still works. XST has improved. But the user_logic is crude, uses registers as zynqgeek's custom peripheral. i want to use OCM to/from BRAM dma to move data/results and just use registers for control. Xilinx is leading me from the shadows slowly but surely. thanks zynqgeek, XAPP 1078 john mcdougall, and AR# 50826 author.