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maximum interrupt frequency using timer interrupt

Former Member

Hi,

The zynq processor is running at 666MHz. I like to sample an ADC every 20 KHz (ISR is called every 20 KHz). I set my processor's timer to

XScuTimer_LoadTimer(&my_Timer, 16667);

Is this even possible?

I tried to measure how many cycle it takes from one interrupt to another one using

#include "xtime_l.h"
XTime tStart;

//and I call my ISR (interrupt Handler), the following

XTime_GetTime(&tStart);

//and print the following

xil_printf("Output took %d clock cycles.
", (int) tStart);

// Results
//Output took 171859333 clock cycles.
//Output took 175360259 clock cycles.

// If I calculate the sampling rate it gives the following

// 666666666/(2*(175360259- 171859333)) = 95.23 

I cannot get more than this value. If I set my timer value to

XScuTimer_LoadTimer(&my_Timer, XPAR_PS7_CORTEXA9_0_CPU_CLK_FREQ_HZ / 2)

I can easily measure how fast interrupt handler gets executed. In this case I would get 1 Hz.

Is there something wrong in the way I measure the cycle elapsed? Can anyone have a better way to measure how fast timer interrupt calls interrupt handler?

Itried to toggle an PMOD pin, I am not able to toggle the pin more than 87 Hz.

I appreciate your help in advance.

Thank you,

  • 0

    Hello,

     

    If you are looking for a literal answer to your question on using the zynq processor timer you will probably have a broader and more knowledgeable audience on one of the Xilinx Community forums as this is not specific to one of the 'zed boards.

     

    https://forums.xilinx.com/

     

     

    If you are looking for an easy way to observe exactly when your timer generates an interrupt you might want to consider using one of the Zynq triple timers. The counter output on the triple timers can be routed directly a Zynq package pin (MIO or EMIO for timer 0 and EMIO for timer 1/2) that you could observe with an oscilloscope (or using Vivado Analyzer in the Zynq PL via EMIO connections).

     

    -Gary