I am working on a proof of concept Linux driver module that will interact with devices in the PL via the EMIO pins. I know the base and max addresses for the GPIO section of memory.
What I am a little confused about is how this section of memory is configured. Given the base address, how do I determine the locations of each MIO/EMIO pin, along with the DIRM, OEN, etc registers? My objective is to create a module that handles GPIO by writing directly to these registers/memory locations.
Thanks for any help.
