The c++ app and the PL logic are verified in SDK using the standalone mode. c++ app and the PL communicated by the AXI-Lite.
But when I moved to Linux(the same c++ app and the same PL logic), the result turned out to be wrong. And each run turned to be a different result!
Considering the AXI-Lite reset and clk signal is beyond my control, I added an external reset and PL_CLK_2 to my custom logic. BUT the results are still wrong!