Hello, i am a newbie in terms programming with the zedboard. I want to communicate with a pmod via spi0 from the PS. My problem is, that the code blocks on the place where i poll the Transmition done flag
while((XSpiPs_ReadReg(unPeripheralAddressSPI,XSPIPS_SR_OFFSET)&0x4)==0)
{
buffer = XSpiPs_ReadReg(unPeripheralAddressSPI,XSPIPS_SR_OFFSET);
}
Buffer is always 0. Can someone of you help me or give me an working exmple?
Is it a problem that i dont use the MIO?
Code:
int ARMSpi4ByteRW( unsigned int unPeripheralAddressSPI, unsigned int* auchWriteBuf, unsigned int* auchReadBuf)
/**
* brief Perform a fixed 4 byte SPI read/write operation using the selected Cortex A9's SPI peripheral
* par Details
* -CPHA and CPOL are set to 0, 0.
* -Pointers are provided to u8 buffers containing the data to be written and received
* -Data in the auchWriteBuf will be clocked out (MSB first) onto the MOSI pin
* -Data from the MISO pin will be placed into the auchReadBuf
* -SS0 is used for chip select and set to active low
* -ARM CPU Clock = 600MHz
* -Peripheral System Clock = 114.287513MHz
* -SCLK freq is set to = CPU CLK/ DIV = 3.57MHz
*
* param[in] unPeripheralAddressSPI - ARM Cortex A9's SPI peripheral address
* param[in] *auchWriteBuf ttt- pointer to write data buffer
* param[out] *auchReadBuf ttt- pointer to read data buffer
*
* retval int ttttt - Always returns 0
*/
{
t//SPI Peripheral Settings
t//Manual Start Command =1 Bit [16]
t//Manual Start Enable = 1 Bit [15]
t//Manual Chip Select = 1 Bit [14]
t//Chip Select Lines => [13:10] 0000 chip select 0 selected, 1111 no chip select selected
t//Make Zero => Bits [9:8]
t//Reserved, => Bits [7:6]
t//Baud rate = clk / 32, => Bits [5:3]
t//CPOL=0 CPHA=1, => Bits [2:1]
t//Enable master mode, => Bit [0]
tunsigned int buffer;
tXSpiPs_WriteReg(unPeripheralAddressSPI,XSPIPS_CR_OFFSET,0xFC25);
t//Enable the SPI peripheral, and the SS0 pin goes high
tXSpiPs_WriteReg(unPeripheralAddressSPI,XSPIPS_ER_OFFSET,0x1);
t//Write a value to the Tx_Data_reg
tXSpiPs_WriteReg(unPeripheralAddressSPI,XSPIPS_TXD_OFFSET,auchWriteBuf[0]);
t//Write a value to the Tx_Data_reg
tXSpiPs_WriteReg(unPeripheralAddressSPI,XSPIPS_TXD_OFFSET,auchWriteBuf[1]);
t//Write a value to the Tx_Data_reg
tXSpiPs_WriteReg(unPeripheralAddressSPI,XSPIPS_TXD_OFFSET,auchWriteBuf[2]);
t//Write a value to the Tx_Data_reg
tXSpiPs_WriteReg(unPeripheralAddressSPI,XSPIPS_TXD_OFFSET,auchWriteBuf[3]);
t//Assert SS1 pin, SS0 goes low
tXSpiPs_WriteReg(unPeripheralAddressSPI,XSPIPS_CR_OFFSET,0xC425);
t//start the SPI transaction by writing a 1 to the Man_start_com bit
tXSpiPs_WriteReg(unPeripheralAddressSPI,XSPIPS_CR_OFFSET,0x1c425);
twhile((XSpiPs_ReadReg(unPeripheralAddressSPI,XSPIPS_SR_OFFSET)&0x4)==0)
t{
ttbuffer = XSpiPs_ReadReg(unPeripheralAddressSPI,XSPIPS_SR_OFFSET);
t}
t//SS1 goes high
tXSpiPs_WriteReg(unPeripheralAddressSPI,XSPIPS_CR_OFFSET,0xFC25);
t//Read the Rx_Data_reg
tauchReadBuf[0]=XSpiPs_ReadReg(unPeripheralAddressSPI,XSPIPS_RXD_OFFSET);
t//Read the Rx_Data_reg
tauchReadBuf[1]=XSpiPs_ReadReg(unPeripheralAddressSPI,XSPIPS_RXD_OFFSET);
t//Read the Rx_Data_reg
tauchReadBuf[2]=XSpiPs_ReadReg(unPeripheralAddressSPI,XSPIPS_RXD_OFFSET);
tauchReadBuf[2]=auchReadBuf[2]<<8;
t//Read the Rx_Data_reg
tauchReadBuf[3]= auchReadBuf[2] + XSpiPs_ReadReg(unPeripheralAddressSPI,XSPIPS_RXD_OFFSET);
treturn 0;
}
