I have reserved the last 16 MB of the ZedBoard's DDR3 memory so Linux won't use it, and I am trying to use it to send data to Zynq programmable logic via a DataMover. From Linux user space, I use mmap and /dev/mem to write the memory. However, my PL doesn't see the data that I think I've written, even though the ChipScope waveforms of the read operation look correct. I suspect a caching issue.
I've seen the Xil functions related to data cache management (Xil_DCacheFlush, etc.) for bare-metal applications. I think I need the equivalent of Xil_DCacheFlushRange. How would I accomplish that operation from Linux, considering that I've told it to ignore the memory? Ideally, I'd like to disable caching entirely on a specific range of DDR3 memory.
