hello, i am using zedboard and xilinx SDK 2013.3
Currently i am using performance counter register for monitoring some program.
I set the counters for specific event. especially i am interested in cache performance so i count the
1. l1_data_cache_refill 0x04
2. l1_data_cache_access 0x03
3. data_cache_eviction 0x65
5. inst_cache_stall 0x60
6. data_cache_stall 0x61
7. inst_cache_miss 0x01
i am sure that i attach counter for specific event and initialize that counter correctly at 0 for the beginning of my target code.
but after doing some experiment, the data out from that counter is unrealistic. for example.. the cache access is too small , instruction cache miss is 0 or data_cache eviction is zero even if i access the vary cache line repeatedly ..
another counter like immediate_branch ,predictable_branch ,mispredicted_branch is working correctly.
so. i wonder the event number i using is correct or not.
anyone can help me to get out of this situation?
i get that event number from DDI0388E_cortex_a9_r2p0_trm.