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standalone SD card SDIO

Former Member

Hello,

I try to use the SD card of the Zedboard via the SDIO port. I use chans FatFs. First I implemented the diskio.c by my own, but then debugging it I found that there is an implementation in an example project, so now I use that one.
It can be found here:
XilinxSDK2014.2dataembeddedswlibsw_servicesxilffs_v2_1


Initialization works partly, but not fully:
.

XSdPs_SdCardInitialize
XSdPs_Change_ClkFreq(&SdInstance, SD_CLK_25_MHZ);
and XSdPs_Select_Card
.

work propperly, but XSdPs_Get_BusWidth does not anymore.
It seems like commands are accepted, but DMA transfers are not:
.
/*
* Send block write command
*/
Status = XSdPs_CmdTransfer(InstancePtr, CMD55,
tttInstancePtr->RelCardAddr, 0);
tif (Status != XST_SUCCESS) {
t....Status = XST_FAILURE;
t....goto RETURN_PATH;
t}

tBlkCnt = XSDPS_SCR_BLKCNT;
tBlkSize = XSDPS_SCR_BLKSIZE;

t/*
t * Set block size to the value passed
t */
tBlkSize &= XSDPS_BLK_SIZE_MASK;
tXSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
tttXSDPS_BLK_SIZE_OFFSET, BlkSize);

tXSdPs_SetupADMA2DescTbl(InstancePtr, BlkCnt, SCR);

tXSdPs_WriteReg16(InstancePtr->Config.BaseAddress,
tttXSDPS_XFER_MODE_OFFSET,
tttXSDPS_TM_DAT_DIR_SEL_MASK | XSDPS_TM_DMA_EN_MASK);

tStatus = XSdPs_CmdTransfer(InstancePtr, ACMD51, 0, BlkCnt);
tif (Status != XST_SUCCESS) {
t....Status = XST_FAILURE;
t....goto RETURN_PATH;
t}
.
SdPs_CmdTransfer(InstancePtr, ACMD51, 0, BlkCnt) returns with 1.
.

Maybe I did something wrong in the hardware design. I added the SD 0 Peripheral and assigned CD to MIO 47, WP to MIO46.
Do I have to activate the DMA somehow?
.
There is one funny fact: when I let the example program run, a file is generated on the SD, but it cannot be neither read nor written by the zynq.
.
Best regards,
Yaro

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  • 0

    By now I found out what the problem with the caches was caused by. In the new Vivado version (2014.4 I think) there is an updated version of the library where these issues are fixed.
    The data transfer over sdio is done via dma. As w.pram mentioned, when you write to the cache, it's not necessarily written to ram immediately. If you want so, you have to flush the cache. Same goes for reading from sdio. If you have read from a buffer, that data is loaded into the cache. When now new data arrives via dma, the cache does'nt know that and still assumes, that his stored data is the most recent one. So you have to tell it explicitely, that the new data has to be loaded. This is done by invalidating the cache.
    Now here we get into trouble, if the buffer is not allignet wit the cache lines, because if e.g. the buffer starts or ends in the middle of a cache line, by invalidateing the cache all changes to the whole line are lost. That might lead to verry hard discoverable bugs.
    Well now all that is taken care of by the updated library, so don't be lazy and update your vivado =)

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  • 0

    By now I found out what the problem with the caches was caused by. In the new Vivado version (2014.4 I think) there is an updated version of the library where these issues are fixed.
    The data transfer over sdio is done via dma. As w.pram mentioned, when you write to the cache, it's not necessarily written to ram immediately. If you want so, you have to flush the cache. Same goes for reading from sdio. If you have read from a buffer, that data is loaded into the cache. When now new data arrives via dma, the cache does'nt know that and still assumes, that his stored data is the most recent one. So you have to tell it explicitely, that the new data has to be loaded. This is done by invalidating the cache.
    Now here we get into trouble, if the buffer is not allignet wit the cache lines, because if e.g. the buffer starts or ends in the middle of a cache line, by invalidateing the cache all changes to the whole line are lost. That might lead to verry hard discoverable bugs.
    Well now all that is taken care of by the updated library, so don't be lazy and update your vivado =)

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