Board Definition file bug

Be aware that there is a bug in the Board Definition that is embedded in Vivado 2018.1 and 2018.2 for Ultra96 that causes the LPDDR4 to fail at the 1GB mark. We are working on a simple patch now.

This does not affect the PetaLinux 2018.2 BSP for Ultra96 that was recently published.

Bryan

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0 dyessgg over 7 years ago

I got MIO8..9 from the HW User Guide, rev 1.0, Version 0.9, section 5.7:
"Ultra96 provides one UART. PS UART1 (MIO8, MIO9) is connected to a 3 pin 2mm header (J6)."

When I created a Vivado project using the board defaults of MIO0..1, exported to SDK and then created a project based upon that, J6 would not work.

Apparently, I was a bit hasty in my previous post. My issue with J6 not working stemmed from the BSP using uart_0 as the default instead of uart_1. Looks like I was making more than one change at the same time. Sorry for the confusion.

Two things from this:
1. The HW USer Guide is incorrect when it states uart1 is routed via MIO8..9.
2. The default in Vivado/SDK of using uart_0 instead of uart_1 needs to be overridden.

Greg
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0 dyessgg over 7 years ago

I got MIO8..9 from the HW User Guide, rev 1.0, Version 0.9, section 5.7:
"Ultra96 provides one UART. PS UART1 (MIO8, MIO9) is connected to a 3 pin 2mm header (J6)."

When I created a Vivado project using the board defaults of MIO0..1, exported to SDK and then created a project based upon that, J6 would not work.

Apparently, I was a bit hasty in my previous post. My issue with J6 not working stemmed from the BSP using uart_0 as the default instead of uart_1. Looks like I was making more than one change at the same time. Sorry for the confusion.

Two things from this:
1. The HW USer Guide is incorrect when it states uart1 is routed via MIO8..9.
2. The default in Vivado/SDK of using uart_0 instead of uart_1 needs to be overridden.

Greg
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