I am trying to understand whether the ultra96's 60-pin HS connector (J3) supports I/O operation at 1.8 V, as I believe it ought to. The Ultra96 HW User Guide implies that it does, on the bottom of page 7.
But when I look at this in the schematic, I get a little confused. Most of the signals on J3 (I particularly care about the differential ones) are hooked up to bank 65 of U1, whose VCCO is hooked up to VCCO_HP. VCCO_HP is provided by LDOA3 of U33, which is a TI TPS650864 PMIC. If I read the data sheet right, LDOA3 can be programmed to be between 0.7 and 1.5 V. This would imply that the maximum VCCO for Bank 65 would be 1.5 V, not 1.8 V as suggested by the user manual.
What am I missing here?
Thank you very much, and I can't wait to have a board in hand!
