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Ultrazed Hardware Design UltraZed SD Boot
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Related

UltraZed SD Boot

Former Member
Former Member over 9 years ago

Xilinx Tool Chain Version: 2016.2

I am currently in the process of recreating the OOBE for the UltraZed IOCC. I have successfully rebuilt the OOBE running the commands manually and applying the configurations/patch files found on Avnet's Github: https://github.com/Avnet/software 

The problem is I am trying to change the rootfs from the RAMFS to the SD Card. In the Petalinux Generic Config File I have changed the Image Packaging Configuration to the following:

# Image Packaging Configuration
#
# CONFIG_SUBSYSTEM_ROOTFS_INITRAMFS is not set
# CONFIG_SUBSYSTEM_ROOTFS_INITRD is not set
# CONFIG_SUBSYSTEM_ROOTFS_JFFS2 is not set
# CONFIG_SUBSYSTEM_ROOTFS_NFS is not set
CONFIG_SUBSYSTEM_ROOTFS_SD=y
# CONFIG_SUBSYSTEM_ROOTFS_OTHER is not set
CONFIG_SUBSYSTEM_SDROOT_DEV="/dev/mmcblk1p2"
CONFIG_SUBSYSTEM_UIMAGE_NAME="image.ub"
# CONFIG_SUBSYSTEM_UIMAGE_HASH_NONE is not set
CONFIG_SUBSYSTEM_UIMAGE_HASH_CRC32=y
# CONFIG_SUBSYSTEM_UIMAGE_HASH_SHA1 is not set
# CONFIG_SUBSYSTEM_UIMAGE_HASH_BOTH is not set
CONFIG_SUBSYSTEM_COMPRESS_IMAGE=y
CONFIG_SUBSYSTEM_DTB_PADDING_SIZE=0x1000
# CONFIG_SUBSYSTEM_COPY_TO_TFTPBOOT is not set

And the Kernel BootArgs:

CONFIG_SUBSYSTEM_BOOTARGS_GENERATED="earlycon=cdns,mmio,0xFF000000,115200n8 root=/dev/mmcblk1p2 rw rootdelay=2 rootfstype=ext4"

In the Device Tree, system-conf.dtsi I modified the bootargs:

chosen {
bootargs = "earlycon=cdns,mmio,0xFF000000,115200n8 root=/dev/mmcblk1p2 rw rootdelay=2 rootfstype=ext4";
stdout-path = "serial0:115200ns";
};

 

Rebuilding with only those changes is causing the Kernel to hang when booting:

U-Boot 2016.01 (Feb 01 2017 - 15:35:26 -0500)
DRAM:  2 GiB
Enabling Caches...
EL Level:       EL2
MMC:   sdhci@ff160000: 0, sdhci@ff170000: 1
Invalid bus 0 (err=-19)
*** Warning - spi_flash_probe() failed, using default environment

## Error: flags type check failure for "serverip" <= "AUTO" (type: i)
himport_r: can't insert "serverip=AUTO" into hash table
In:    serial
Out:   serial
Err:   serial
Bootmode: SD_MODE1
Net:   ZYNQ GEM: ff0e0000, phyaddr 5, interface rgmii-id
eth0: ethernet@ff0e0000

U-BOOT for Linux

Hit any key to stop autoboot:  0
Device: sdhci@ff160000
Manufacturer ID: 13
OEM: 14e
Name: Q2J55
Tran Speed: 52000000
Rd Block Len: 512
MMC version 5.0
High Capacity: Yes
Capacity: 7.1 GiB
Bus Width: 8-bit
Erase Group Size: 512 KiB
HC WP Group Size: 8 MiB
User Capacity: 7.1 GiB WRREL
Boot Capacity: 16 MiB ENH
RPMB Capacity: 4 MiB ENH
reading image.ub
5312456 bytes read in 370 ms (13.7 MiB/s)
## Loading kernel from FIT Image at 10000000 ...
   Using 'conf@1' configuration
   Trying 'kernel@1' kernel subimage
     Description:  PetaLinux Kernel
     Type:         Kernel Image
     Compression:  gzip compressed
     Data Start:   0x100000f4
     Data Size:    5283581 Bytes = 5 MiB
     Architecture: AArch64
     OS:           Linux
     Load Address: 0x00080000
     Entry Point:  0x00080000
     Hash algo:    crc32
     Hash value:   962d8cfa
   Verifying Hash Integrity ... crc32+ OK
## Loading fdt from FIT Image at 10000000 ...
   Using 'conf@1' configuration
   Trying 'fdt@1' fdt subimage
     Description:  Flattened Device Tree blob
     Type:         Flat Device Tree
     Compression:  uncompressed
     Data Start:   0x1050a0dc
     Data Size:    27564 Bytes = 26.9 KiB
     Architecture: AArch64
     Hash algo:    crc32
     Hash value:   8891f2ad
   Verifying Hash Integrity ... crc32+ OK
   Booting using the fdt blob at 0x1050a0dc
   Uncompressing Kernel Image ... OK
   Loading Device Tree to 0000000007ff6000, end 0000000007fffbab ... OK

Starting kernel ...

[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.4.0 (rshumate@ip-172-31-62-121.ec2.internal) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #1 SMP Wed Feb 1 15:33:48 EST 2017
[    0.000000] Boot CPU: AArch64 Processor [410fd034]
[    0.000000] earlycon: Early serial console at MMIO 0xff000000 (options '115200n8')
[    0.000000] bootconsole [uart0] enabled
[    0.000000] cma: Reserved 128 MiB at 0x0000000078000000
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.0 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: MIGRATE_INFO_TYPE not supported.
[    0.000000] PERCPU: Embedded 16 pages/cpu @ffffffc077f8e000 s24704 r8192 d32640 u65536
[    0.000000] Detected VIPT I-cache on CPU0
[    0.000000] CPU features: enabling workaround for ARM erratum 845719
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 517120
[    0.000000] Kernel command line: earlycon=cdns,mmio,0xFF000000,115200n8 root=/dev/mmcblk1p2 rw rootdelay=2
[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
[    0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes)
[    0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes)
[    0.000000] software IO TLB [mem 0x71e00000-0x75e00000] (64MB) mapped at [ffffffc071e00000-ffffffc075dfffff]
[    0.000000] Memory: 1856664K/2097152K available (7198K kernel code, 520K rwdata, 2748K rodata, 280K init, 356K bss, 109416K reserved, 131072K cma-reserved)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vmalloc : 0xffffff8000000000 - 0xffffffbdffff0000   (   247 GB)
[    0.000000]     vmemmap : 0xffffffbe00000000 - 0xffffffbfc0000000   (     7 GB maximum)
[    0.000000]               0xffffffbe00000000 - 0xffffffbe01c00000   (    28 MB actual)
[    0.000000]     fixed   : 0xffffffbffa7fd000 - 0xffffffbffac00000   (  4108 KB)
[    0.000000]     PCI I/O : 0xffffffbffae00000 - 0xffffffbffbe00000   (    16 MB)
[    0.000000]     modules : 0xffffffbffc000000 - 0xffffffc000000000   (    64 MB)
[    0.000000]     memory  : 0xffffffc000000000 - 0xffffffc080000000   (  2048 MB)
[    0.000000]       .init : 0xffffffc000a38000 - 0xffffffc000a7e000   (   280 KB)
[    0.000000]       .text : 0xffffffc000080000 - 0xffffffc000a37044   (  9949 KB)
[    0.000000]       .data : 0xffffffc000a90000 - 0xffffffc000b12160   (   521 KB)
[    0.000000] Hierarchical RCU implementation.
[    0.000000]  Build-time adjustment of leaf fanout to 64.
[    0.000000]  RCU restricting CPUs from NR_CPUS=8 to nr_cpu_ids=4.
[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=64, nr_cpu_ids=4
[    0.000000] NR_IRQS:64 nr_irqs:64 0
[    0.000000] GIC: Adjusting CPU interface base to 0x00000000f902f000
[    0.000000] GIC: Using split EOI/Deactivate mode
[    0.000000] Architected cp15 timer(s) running at 100.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x171024e7e0, max_idle_ns: 440795205315 ns
[    0.000004] sched_clock: 56 bits at 100MHz, resolution 10ns, wraps every 4398046511100ns
[    0.008362] Console: colour dummy device 80x25
[    0.012618] console [tty0] enabled
[    0.015983] bootconsole [uart0] disabled
 
Any help solving this would be greatly appreciated!
Thanks,
Ryan 
 
 
 
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  • Former Member
    0 Former Member over 9 years ago

    I figured out the issue. I wasn't including the device tree bindings header for the PHY in the system-conf.dtsi.

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  • Former Member
    0 Former Member over 9 years ago

    I figured out the issue. I wasn't including the device tree bindings header for the PHY in the system-conf.dtsi.

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