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Programming FPGA problem- bitstream is not compatible with the target revision

pgielmuda

Hi,

I'm doing UltraZed PCIe Carrier Card Tutorial on Vivado V2017.2. Everything went pretty well. I've generated bitsream with vivado and run all off programs till I stucked on 9.3 chapter where I need to program FPGA with generated bitstream. In the SDK there is an error:


09:49:27 ERROR : bitstream is not compatible with the target revision, use -no-revision-check to allow programming

 

When I've tried to program the device with Vivado and I got such error:

 

ERROR: [Labtools 27-3303] Incorrect bitstream assigned to device. Bitstream was generated for part xczu3eg-sfva625-1-i-es1, target device (with IDCODE revision 1) is compatible with production revision bitstreams.
To allow the bitstream to be programmed to the device, use "set_param xicom.use_bitstream_version_check false" tcl command.
 
What does it mean and how to solve it. 
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  • 0

    Ok, I've managed to program the device with the Vivado. I used proposed tcl command:
    set_param xicom.use_bitstream_version_check false

    and then program the device with the bitstream.

    Now in the SDK I do not program the FPGA and just run the software. The first run of software gives reasonable outcome. I get proper messages from COM port. However if I want to:
    - run the software second time there is an error:

    Error while launching program: 
    Memory write error at 0x0. Cannot read sctlr_el3. Cannot read r0. Instruction transfer timeout
     
    - program the FPGA with vivado there is an error:
    ERROR: [Labtools 27-3165] End of startup status: LOW
    I need to reset whole board to get proper outcome of software another time.  
     
     
    Based on that I have few questions:
    1. do usage of tcl command: set_param xicom.use_bitstream_version_check false is justified, safe and do not influence proper work of MPSoC?
    2. how to apply this command to SDK so that I could program the FPGA from SDK?
    3. should I worry about errors which are in this post above?
    4. is there a way to set up environment (SDK or Vivado) to not encounter all of this problems in the future (to solve the reason of it not just apply the path command)? 
     
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  • 0

    Ok, I've managed to program the device with the Vivado. I used proposed tcl command:
    set_param xicom.use_bitstream_version_check false

    and then program the device with the bitstream.

    Now in the SDK I do not program the FPGA and just run the software. The first run of software gives reasonable outcome. I get proper messages from COM port. However if I want to:
    - run the software second time there is an error:

    Error while launching program: 
    Memory write error at 0x0. Cannot read sctlr_el3. Cannot read r0. Instruction transfer timeout
     
    - program the FPGA with vivado there is an error:
    ERROR: [Labtools 27-3165] End of startup status: LOW
    I need to reset whole board to get proper outcome of software another time.  
     
     
    Based on that I have few questions:
    1. do usage of tcl command: set_param xicom.use_bitstream_version_check false is justified, safe and do not influence proper work of MPSoC?
    2. how to apply this command to SDK so that I could program the FPGA from SDK?
    3. should I worry about errors which are in this post above?
    4. is there a way to set up environment (SDK or Vivado) to not encounter all of this problems in the future (to solve the reason of it not just apply the path command)? 
     
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