instantiating DRAM in Avnet UltraZed block diagram

Hello,

I cannot find the DRAM using the "+" or other tools to add it into a block diagram. How is this done. Example project using a DDR module which is not supported by this board.

Thanks,

Ejarle

0 jafoste4 over 8 years ago

Hi,
Are you takling about connecting to a ddr4 via the PL? If so you will need a Memory controller IP
--Josh
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0 earle_jennings over 8 years ago in reply to jafoste4

Yes, Josh. I am at a loss as to how to instantiate it and its controller.
Example code or IP would be useful.
Thanks,
Earle
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0 jafoste4 over 8 years ago

Hello Earle,
In the Zynq 7000 devices you have the MIG. However looking at my UltraZed3EG available IP I don't see that there. My suggestion would be to ask this question over at the Xilinx Support Forum https://forums.xilinx.com/
--Josh
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