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Ultrazed Hardware Design JTAG not working with cross triggering (SDK vs. HW Manager)
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JTAG not working with cross triggering (SDK vs. HW Manager)

100ashraf
100ashraf over 9 years ago

Hi,

We put an iLA core inside Zynq MP+ and trying to use it for trace capture while we were trying to run code from SDK.  we are seeing issues like not able to find debug core in "Hardware Manager" in Vivado to some error messages:

"ERROR: [Xicom 50-38] xicom: Unable to connect to debug core(s) on the target device. Check cable connectivity and that the target board is powered up then use the disconnect_hw_server and connect_hw_server to re-initialize the hardware target. Use open_hw_target to re-register the hardware device."

Also sometimes SDK gets hung with serial port stops outputting any further reads from CPU.

Seems we are having conflicts on JTAG port for software access vs. vs. hardware manager access for iLA tracing.

Is there a good way to handle this? Lets say I wanted to capture iLA while running C code from SDK.

Currently I somehow did this way:

1. download FPGA image as well as C code from SDK to DDR. Put a "inbyte()" inside C code to wait for my key stroke in UART/serial prompt.

2. Download *.bit file from Vivado hardware manager again and setup iLA with trigger set.

3. Use the key stroke in serial prompt to start C code execution.

Any better ideas? Can we do it using two separate JTAG ports or something?

Regards,

Ashraf

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  • jafoste4
    0 jafoste4 over 9 years ago

    Hello Ashraf,

    First off what hardware are you using? Are you using our new UltraZed SOM and IO Carrier? 

    From my understanding you are trying to access the device through the hardware manager(over JTAG), and also running a program in debug mode(over JTAG as well). Is this correct?

    --Josh

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  • 100ashraf
    0 100ashraf over 9 years ago in reply to jafoste4

    Hi Josh,

    yes, I am using your new ultrazed SOM and IO card. and yes, I wanted to capture the waveform when I run the software from SDK. For my particular test case I wanted to transfer a large chunk of data from PL side (block RAM) to DDR using DMA controller.

    Is it SOM/IO card issue or Xilinx FPGA cannot handle both same time? that will be a severe limitation for debug.

     

    Regards,

    Ashraf

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  • jafoste4
    0 jafoste4 over 9 years ago

    Hello Ashraf,

    It should be possible, can you tell me which Vivado version and SDK version you are using?

    Take a look at this forum post :

    https://forums.xilinx.com/t5/Embedded-Processor-System-Design/Simultaneous-SDK-and-Hardware-Manager-debugging-as-in-UG940-does/td-p/397521

    The process execute a program in SDK and also monitor it using the hardware manager is  documented in UG940

    https://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_2/ug940-vivado-tutorial-embedded-design.pdf

    --Josh

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  • 100ashraf
    0 100ashraf over 9 years ago in reply to jafoste4

    Hi Josh,

    That seem to work for me. I am using Vivado/SDK 2016.4. Although the UG940 is little out of date based on 2016.4.

    Thank you so much!!

    Regards,

    Ashraf

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  • pirodily
    0 pirodily over 7 years ago

    pen_hw_target to re-register the hardware device."
    Also sometimes SDK gets hung with serial port stops outputting any further reads from CPU.
    Seems we are having conflicts on JTAG port for software access vs. vs. hardware manager access for iLA tracing.
    Is there a good way to handle this? Lets say I wanted to capture iLA while running C code from SDK.
    Currently I somehow did this way:
    1. download FPGA image as well as C code from SDK to DDR. Put a "inbyte()" inside C code to wait for my key stroke in UART/serial prompt.
    2. Download *.bit file from Vivado hardware m

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  • jafoste4
    0 jafoste4 over 7 years ago

    Hi,

    If you refer to Lab 8 of the Developing Zynq Hardware Speedway located here http://zedboard.org/support/trainings-and-videos

    It goes through exactly what your attempting to do.

    -Josh

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  • xdf666
    0 xdf666 over 4 years ago in reply to 100ashraf

    Hello 100ashraf !!! I have the same problem as you. The first link of jafoste4 is unaccessable nowdays. How did you solve the problem? Thanks a lot !!!

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  • bhfletcher
    0 bhfletcher over 4 years ago in reply to xdf666

    SDK is now replaced by Vitis. I came across this link that looked useful when searching for Vitis and Hardware Manager Debugging.  xilinx.github.io/.../debug_lab.html

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