UltraZed PCIe Carrier Card Schematic

Question

Hello

Thank you for taking the time to answer this. I was studying the UltraZed PCIe Carrier Card Schematic and it noted on Sheet 12 that the Pin Assignments on JX1 and JX2 have not been finalized and will be swapping as following contrains and then it notes some possible swaps on the FMC connector.

Has all that been finalized? I'm having some issues with my signals using those pins. I simple have some LVDS signals routed out of the FMC pins and looped back into more pins on the FMC and it is not working. So I am tracing it all back and that note has me bothered. So please let me know the state of those pins.

In particular I am using

FMC_LA06_P/N, FMC_LA10_P/N,

FMC_LA14_P/N and FMC_LA01_CC_P/N.

I have FMC_LA06_P/N connected to FMC_LA10_P/N.

I have FMC_LA14_P/N as Clock Out connected to FMC_LA01_CC_P/N as Clock In.

All of these are defined as LVDS and the inputs have the DIFF_TERM_ADV set to TERM_100.

Best Regards

Gary

jafoste4 · Accepted Answer

Hello Gary, That note in the schematic should be ignored. All Pin assignments are finalized as per the schematic. We will remove that note soon. Thanks for bringing that to our attention. --Josh