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Ultrazed Hardware Design Power fails on AES-ZU3EGES-1-SK-G  boards
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Power fails on AES-ZU3EGES-1-SK-G  boards

100jwilly
100jwilly over 8 years ago

After running I/O carrier board and module for about 4 hours the power to the boards failed.

This has occurred on another board set we using for development. Jumpers on IO carrier boards are in the correct positions and JP1 on SOC module is removed.

Led D10 VIN-HDR is on and led D9 PG-MODULE is off.

Tried cycling the power off and on but will not power up.

Has this been observed on other UltraZed boards? Any way to get this working?

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  • jafoste4
    0 jafoste4 over 8 years ago

    Hi John,

    I just want to clarify a few things, you are not attempting to perform power down states with software (even accidentatlly) correct?

    You can remove the accidental part by making sure the PMBUS Shunts and PWR_Disable shunts are remove, ie - do not shunt JP1,JP2, or JP3 on the SOM

    The only other item to look at would be +5VREG failing, U21 on the SOM. This can be measured at inductor L9, capacitor C223, or JP1 pin 1 (divided down version of +5VREG). In essence, by doing this we are measuring the un-shunted PWR_DISABLE signal which in turn controls the SOM power supplies.

    --Josh

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  • 100jwilly
    0 100jwilly over 8 years ago in reply to jafoste4

    Hi Josh,

    That is correct, there is no power system control in software, even accidently.

    I removed shunts  JP2, and JP3, JP1 was already removed. Same result as before, module is not powered.

    L9 :    4.991V

    J1-1 0.417V

     

    John

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  • 100jwilly
    0 100jwilly over 8 years ago in reply to jafoste4

    Hi Josh,

    That is correct, there is no power system control in software, even accidently.

    I removed shunts  JP2, and JP3, JP1 was already removed. Same result as before, module is not powered.

    L9 :    4.991V

    J1-1 0.417V

     

    John

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