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Ultrazed Hardware Design Fail to build Avnet DisplayPort reference design
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Fail to build Avnet DisplayPort reference design

thibchap
thibchap over 8 years ago

Hi all,

After multiple tries, I always fail to build the UltraZed 3EG Starter Kit - Display Port Design 2017.2. The pre-built image (BOOT.BIN + image.ub) works well (though I need to remove jumper JP1 which is mis-documented in the tutorial).

 

But when I launch the script $ ./make_uz3eg_iocc_dp_bsp.sh it fails while executing $ petalinux-build.

For info, my setup : Ubuntu 16.04, Vivado+SDK 2017.2, PetaLinux 2017.2.

Here is the error message I get, when the script reaches petalinux-build.

 

...

ERROR: pmu-firmware-2017.2+gitAUTOINC+122565ec40-r0 do_compile: Function failed: do_compile (log file is located at /home/mse/workspace/Avnet/petalinux/projects/uz3eg_iocc_dp_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/pmu-firmware/2017.2+gitAUTOINC+122565ec40-r0/temp/log.do_compile.65787)

ERROR: Logfile of failure stored in: /home/mse/workspace/Avnet/petalinux/projects/uz3eg_iocc_dp_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/pmu-firmware/2017.2+gitAUTOINC+122565ec40-r0/temp/log.do_compile.65787

Log data follows:

| DEBUG: Executing python function xsct_externalsrc_compile_prefunc

| NOTE: pmu-firmware: compiling from external source tree /opt/pkg/petalinux/tools/hsm/data/embeddedsw

| DEBUG: Python function xsct_externalsrc_compile_prefunc finished

| DEBUG: Executing shell function do_compile

| Starting xsdk. This could take few seconds... Eclipse:

| An error has occurred. See the log file

| /home/mse/workspace/Avnet/petalinux/projects/uz3eg_iocc_dp_2017_2/components/plnx_workspace/.metadata/.log.

| XSCTHELPER INFO: Empty WorkSpace

| Starting xsdk. This could take few seconds... Eclipse:

| An error has occurred. See the log file

| /home/mse/workspace/Avnet/petalinux/projects/uz3eg_iocc_dp_2017_2/components/plnx_workspace/.metadata/.log.

| timeout while establishing a connection with SDK

|     while executing

| "error "timeout while establishing a connection with SDK""

|     (procedure "getsdkchan" line 111)

|     invoked from within

| "getsdkchan"

|     (procedure "projects" line 35)

|     invoked from within

| "projects -clean -type $type -name $name"

|     (procedure "clean_n_build" line 2)

|     invoked from within

| "clean_n_build bsp $params(bspname)"

|     invoked from within

| "if { $params(ws) ne "" } {

| #Local Work Space available

| setws $params(ws)

| if { [catch {importprojects $params(ws)} result] } {

| puts "XSCTHELPER IN..."

|     (file "/home/mse/workspace/Avnet/petalinux/projects/uz3eg_iocc_dp_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/pmu-firmware/2017.2+gitAUTOINC+122565ec40-r..." line 120)

...

 

As you can see, It mention "error "timeout while establishing a connection with SDK"" which could be the root of the problem...? Does anyone know how to fix this?

Thanks for your help,

Thibault

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  • jafoste4
    0 jafoste4 over 8 years ago

    Hello Thibault,

    When you say you must remove JP1, are you refering to removing the jumper on the carrier card or the UltraZed SOM? The documentation states to have it installed on the IO Carrier Card. However if you accidently installed the jumper on JP1 on the SOM it would not let your board power up properly.

    --Josh

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  • thibchap
    0 thibchap over 8 years ago in reply to jafoste4

    Hi Josh,



    Yes I'm talking about JP1 on the IO Carrier Card which is labeled CLK SELB. If I have it closed, the DisplayPort controller cannot find the display. It was the solution found on this thread: http://zedboard.org/content/display-port-reference-design#comment-62581.

     

    Thibault

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  • albertabeef
    0 albertabeef over 8 years ago

    Thibault,

    You are correct, the documentation omits to mention that the following carrier card jumper settings are required for the DisplayPort design.

    Since the design makes use of the IDT clock synthesizer, the J1 and J2 jumpers must be placed at positions 2-3, and jumper JP1 removed.

    This will allow the IDT part to be programmed by the ZynqU+ device via I2C.

    I will update the design documentation.

    Mario.

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