Hi,
I bought from Avnet a Touch Display 10' (AES-ALI3-AMPIRE10-G) and an UltraZed 3EG Kit (AES-ZU3EG-1-SK-G). Unfortunately, there isn't any reference design on what I have seen on the web. The closest reference design was found on GitHub Avnet HDL Reference Designs (https://github.com/Avnet/hdl/tree/master/Projects/zedboard_ali3_amp10). Unfortunately, this project is targeted for a Zedboard, therefore changes must be made.
Now, I have a design on Vivado 2018.2 that contains an Ultrascale+ MPSoC and the AVNET's display controller IPs. A review of the design (clock freq, IP configuration,..) remains to be done.
The Vivado 2018.2 new design is generated from new TCL scripts based on zedboard_ali3_amp10 project.
Does anyone can help me to configure the Vivado design ? (I attached the project in Vivado 2018.2)
Best regards,
Pat
