Ultrazed using DDR4 example?

I want to implement a design using the DDR4 memory on the Ultrazed, accessing from the PL (via AXI?). Are there any examples?

many thanks

0 drozwood90 over 6 years ago

Hi there,

Are you referring to the DDR4 that is hanging off the PL or the DDR4 accessible through the PS?

--Dan
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0 jpcoetzee over 6 years ago in reply to drozwood90

Accessible through the PS. I don't think there is any hanging off the PL?

Thanks for your reply.
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0 drozwood90 over 6 years ago in reply to jpcoetzee

Hi there,

Is this the UltraZed-EV or UltraZed-EG?

--Dan
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0 jpcoetzee over 6 years ago in reply to drozwood90

UltraZed-EG
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0 drozwood90 over 6 years ago in reply to jpcoetzee

Hi there,

That makes more sense why you would say that. The UltraZed-EV has DDR4 tied to the PL itself.
We do not have a reference design example like what you are asking. However, you can just drop the AXI block in Vivado, then connect it to your IP. From there, you just use the assigned memory locations (or assign them yourself).

You can see similar things in the Hardware Training Course that we have around the Zynq chip. We have an update around the Ultra96 - which is a MPSoC that is coming soon, which sounds more like what you are asking for.

--Dan
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0 jpcoetzee over 6 years ago in reply to drozwood90

> The UltraZed-EV has DDR4 tied to the PL itself.

Oooh, interesting. That might be more useful to me. Are there example designs for the UltraZed-EV which include the PL DDR4?

Thanks for you previous answers.
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0 drozwood90 over 6 years ago in reply to jpcoetzee

Hi there,

The only design we have that accesses the PL DDR4 is the VCU design.
Take a look at the ROOT blog here:
http://avnet.me/AvnetUZEVVCU

Third link from the bottom is the BLOG that explains what is going on and will take you to the code/design/prebuilt images.

--Dan
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