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Ultrazed Hardware Design Anyone has built a petalinux project using Avnet BSP, configured the device tree and booted using SD card on Avnet Ultrazed EV Carrier Card (FPGA : Xilinx XCZU7EV-FBVB900) ?
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Anyone has built a petalinux project using Avnet BSP, configured the device tree and booted using SD card on Avnet Ultrazed EV Carrier Card (FPGA : Xilinx XCZU7EV-FBVB900) ?

AshwinRavisankar
AshwinRavisankar over 3 years ago

Anyone has built a petalinux project using Avnet BSP, configured the device tree and booted using SD card on Avnet Ultrazed EV Carrier Card ?

 BSP : https://avtinc.sharepoint.com/teams/ET-Downloads/Shared%20Documents/Forms/AllItems.aspx?id=%2Fteams%2FET%2DDownloads%2FShared%20Documents%2Fprojects%2Fpublic%5Frelease%2F2020%2E2%2FBSP&viewid=dba68156%2Dce4b%2D4ebb%2Db7a7%2Dec03b27b013d

 Avnet Ultrazed EV Carrier Card : https://www.avnet.com/wps/portal/us/products/avnet-boards/avnet-board-families/ultrazed/ultrazed-ev/

 I am able to build the project successfully, package the boot files into a BOOT.BIN, but unfortunately the boot using SD card hangs at the Starting Kernel ... stage. However the pre-built boot images which comes along with the BSP works and the boot happens. But i want to modify the device tree to add a GEM0 Ethernet MAC and build the project which is giving me trouble since i cant get it to boot. BootLog file shows the hang, Kindly help

Xilinx Zynq MP First Stage Boot Loader
Release 2020.2 Apr 28 2021 - 07:36:59
NOTICE: ATF running on XCZU7EV/silicon v4/RTL5.1 at 0xfffea000
NOTICE: BL31: v2.2(release):xlnx_rebase_v2.2_2020.3
NOTICE: BL31: Built : 12:52:01, Dec 2 2021


U-Boot 2020.01 (Dec 02 2021 - 12:52:05 +0000)

Board: Xilinx ZynqMP
DRAM: 4 GiB
PMUFW: v1.1
EL Level: EL2
Chip ID: zu7ev
NAND: 0 MiB
MMC: mmc@ff160000: 0, mmc@ff170000: 1
In: serial@ff000000
Out: serial@ff000000
Err: serial@ff000000
Bootmode: SD_MODE1
Reset reason: EXTERNAL
Net:
ZYNQ GEM: ff0e0000, mdio bus ff0e0000, phyaddr 0, interface rgmii-id

Warning: ethernet@ff0e0000 using MAC address from DT
eth0: ethernet@ff0e0000
Hit any key to stop autoboot: 0
switch to partitions #0, OK
mmc1 is current device
Scanning mmc 1:1...
Found U-Boot script /boot.scr
2007 bytes read in 16 ms (122.1 KiB/s)
## Executing script at 20000000
8653876 bytes read in 596 ms (13.8 MiB/s)
## Loading kernel from FIT Image at 10000000 ...
Using 'conf@system-top.dtb' configuration
Trying 'kernel@1' kernel subimage
Description: Linux kernel
Type: Kernel Image
Compression: gzip compressed
Data Start: 0x100000f4
Data Size: 8609540 Bytes = 8.2 MiB
Architecture: AArch64
OS: Linux
Load Address: 0x00080000
Entry Point: 0x00080000
Hash algo: sha256
Hash value: 47d9532b392e118b3285ad44b32a9ed2dc51193a7a98087e2d1e12d2dcf6db04
Verifying Hash Integrity ... sha256+ OK
## Loading fdt from FIT Image at 10000000 ...
Using 'conf@system-top.dtb' configuration
Trying 'fdt@system-top.dtb' fdt subimage
Description: Flattened Device Tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0x10836108
Data Size: 42435 Bytes = 41.4 KiB
Architecture: AArch64
Hash algo: sha256
Hash value: d9a4798dfee82827ce54d447f24ca3d7daa68c65aed768120d521d31b22c9b1a
Verifying Hash Integrity ... sha256+ OK
Booting using the fdt blob at 0x10836108
Uncompressing Kernel Image
Loading Device Tree to 000000000fff2000, end 000000000ffff5c2 ... OK

Starting kernel ...

[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[ 0.000000] Linux version 5.4.0-xilinx-v2020.2 (oe-user@oe-host) (gcc version 9.2.0 (GCC)) #1 SMP Tue Nov 30 15:28:10 UTC 2021
[ 0.000000] Machine model: xlnx,zynqmp
[ 0.000000] earlycon: cdns0 at MMIO 0x00000000ff000000 (options '115200n8')
[ 0.000000] printk: bootconsole [cdns0] enabled
[ 0.000000] efi: Getting EFI parameters from FDT:
[ 0.000000] efi: UEFI not found.
[ 0.000000] cma: Reserved 1024 MiB at 0x000000003fc00000
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
[ 0.000000] psci: SMC Calling Convention v1.1
[ 0.000000] percpu: Embedded 21 pages/cpu s48600 r8192 d29224 u86016
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: detected: ARM erratum 845719
[ 0.000000] Speculative Store Bypass Disable mitigation not required
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031940
[ 0.000000] Kernel command line: earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk1p2 rw rootwait
[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] software IO TLB: mapped [mem 0x3bc00000-0x3fc00000] (64MB)
[ 0.000000] Memory: 2979980K/4193280K available (12412K kernel code, 756K rwdata, 3808K rodata, 768K init, 562K bss, 164724K reserved, 1048576K cma-reserved)
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] rcu: RCU event tracing is enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] GIC: Adjusting CPU interface base to 0x00000000f902f000
[ 0.000000] GIC: Using split EOI/Deactivate mode
[ 0.000000] irq-xilinx: /amba/axi-interrupt-ctrl: num_irq=32, sw_irq=0, edge=0x0

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  • Gustav
    Gustav over 3 years ago +1
    I have the exact same problem. I have manage to build the out of box design by deselecting "--extensible Vitis project" and boot that one and I can add my personal things to the Vivado block design. But…
  • PoorBruce
    PoorBruce over 3 years ago +1
    Hi Ashwin, I'm suffering the same symptoms with an Ultra96v2 board. Were you able to resolve your issue? Thanks, Bruce
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  • PoorBruce
    0 PoorBruce over 3 years ago

    Hi Ashwin, I'm suffering the same symptoms with an Ultra96v2 board. Were you able to resolve your issue?  Thanks, Bruce

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  • PoorBruce
    0 PoorBruce over 3 years ago

    Hi Ashwin, I'm suffering the same symptoms with an Ultra96v2 board. Were you able to resolve your issue?  Thanks, Bruce

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