Hello! I am designing the hardware for a board that uses two of the 7EV SOMs. I would like one SOM to power up and boot before the other SOM. I know the expected power up method requires the primary SOM power to come up, then the carrier board uses the SOM_PG_OUT signal to sequence up the remaining power supplies. This has to happen within 300mS of SOM_PG_OUT assertion. If primary power comes up at the same time for both SOMs (ie a 12V supply for the whole system) is there a way to delay one SOM beyond the 300mS period? Or possibly recover from the error created by that violation with a reset, maybe the SOM_RESET_IN_N signal? Any ideas on how best to handle two SOMs on one board is appreciated. Thanks.
PS: I think ideally I'd like to find a way to allow both SOMs to power up simultaneously, but have one of them delay the FPGA configuration using a pin in the SOM interface, if such a pin exists.