No Ultrazed-EG SDSoC platform supplied

Hi there,

Are you trying to get the platforms for the UltraZed-EG with IOCC?

I used the link you provided to access the Zedboard.org website.  Then downloaded every SDSoC file (including the whitepapers).  I do not experience what you say regarding corruption, nor broken links.

I am not sure where the egnyte link you are using came from, but all the files listed on the Zedboard.org link you provided worked for me.

Perhaps your browser didn't download properly?  I used Chrome and FIrefox to download the 4 files listed on the webpage you linked.  Each unzipped without issue.

Please help me to help you, let me know which platform in particular you are trying to download, which browser you are using as well as which Zip you are trying to get.  The filename of the zip file would be most helpful.

I'm also not sure what you mean that "it's even obvious in the pdf".  I took a look in the PDF and do not see any wording regarding corruption.

--Dan

Hello Dan,

yes I am using Ultrazed-EG IOCC board,

for the 2017.2 SDSoC platform the archive you downloaded just contains the pdf guide, inside of the pdf you will find the link to download the SDSoC platform so that you can use it yourself, but this link is broken.

for the 2018.2 platform look at the pdf page 15, I put a screenshot, for the uzefiocc_avnet board....the location and board type are set wrongly...which leads any attempt to building an application project on this platform not to compile

thanks for your help

Hi there,

I see what you mean now, thank you for being specific.  It is really helpful to get to a resolution quickly!

I believe the 2017 file was removed due to obsolescence issues with the older tools.  I am sorry the file was not updated.

As for the 2018 file, the pin map for the two platforms should really be the same - from the standpoint of the SOM.  The Matrix Multiply example that was provided was actually compiled with that platform.  The prebuilt boot.bin file was included.  I have personally booted the boot.bin in the folder for the IOCC, on my IOCC without issue.

Regardless, this should not prevent the build from compiling, just possibly not having the correct pin in the correct place, although I do not think that would be an issue to start your design efforts - especially considering the portability of the SDSoC design structure.

While I check on the naming issue and see if there is a new version coming soon for the 2018.3 tools, can you tell me if you installed the board definition files?  That would prevent the compilations.  In the mean time, I would start out with the platforms as you have them and as soon as I have something I will update you.

--Dan

Yeah that could be the problem as i only installed board definition files for the IOCC board, I'll install the PCIE as well to see if that would help, yeah would be very helpfull if there is a new version coming soon

Hey Dan, do you happen to have the 2017.2 sdsoc platform backed up, and can send it to me?

Hi there,

I wanted to update you that we are working to release the platform files.  Apparently there is some sort of goof that causes the IOCC to get the PCIeCC designation.  We are working to correct this and hope to have everything updated to the new tools and posted soon.  In the mean time, it seems that all the other platforms created and are flowing through the creation process just fine.

Once the documentation and final validation is complete as well as the IOCC/PCIeCC issue is worked out, the archive will be posted.  I'll let you know as soon as that happens!

--Dan

Abdul,

I'm not sure what you mean?  All of the platforms have been posted as well as instructions to recreate them.  Are you referring to the SOURCE files?  If so, they came from the tool following the flow listed in the instructions.

--Dan

Abdul,

So it seems we had two things going on here.  First the Board name that you pointed out above was not matching is a textual string.  It really didn't matter regarding building or using that.  Second, the platform that you were using WAS actually built incorrectly.  The history I was able to pull suggests that the build flow was accidentally ticked with the PCIe CC board for each.  The new platform that I am making does NOT have this and has the text corrected.  Please note that the OTHER platforms listed all have "AV" as the board name.

I think the build issue you had, was actually what we spoke about above.  With the platform clamoring for the PCIeCC (when choosing the IOCC), that is what caused you build issues.  It was likely never caught as we install ALL the board definitions on our systems here...and testing the image, it would still boot as both SOM are the same in BOTH cases.  You only target different IO when it comes differences.  Looking at the board presets, I am also seeing differences related to the transceivers, however, again, we are only using a Matrix Multiply to test - so again, we did not catch this really odd mistake.

Anyway, I've posted all the new platforms for v2018.3.

http://zedboard.org/support/design/17596/131

Thank you for bringing the bad one to our attention.  I'll see about correcting the bad file.

--Dan

The 2018.3 SDSoC platform says that is only for standalone configuration and not for Linux.

Could you please supply a Linux platform configuration for SDSoC?

Thank you,

Panos

Hello,

I'm sorry, I cannot provide that.  We do not have a BSP for the 2018.3 version at this time.  That is a requirement for this.

--Dan