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ZedBoard Hardware Design FMC Clk Question
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Related

FMC Clk Question

Former Member
Former Member over 13 years ago

Hi Zedboard form! I have a quick question:

I am trying to attach a camera through the FMC LPC port on the zedboard.

In my own project, and in the design project in the avnet document "FMC-IMAGEON Building a Video Design from Scratch Tutorial," I get the same error generating the bitfile. It reads:

"
[Bitgen 342] This design contains pins which have locations (LOC) that are not user-assigned or I/O Standards (IOSTANDARD) that are not user-assigned.  This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected.  To prevent this error, it is highly suggested to specify all pin locations and I/O standards to avoid potential contention or conflicts and allow proper bitstream creation.  To demote this error to a warning and allow bitstream creation with unspecified I/O location or standards, you may apply the following bitgen switch: -g UnconstrainedPins:Allow
This message applies to the following I/O ports:
   fmc_imageon_hdmi_in_0_clk_pin
"

In addition, I also get the critical warning related to that same pin:

"
[Constraints 18-5] Cannot loc instance 'fmc_imageon_hdmi_in_0_clk_pin_BUFGP/BUFG' at site D18, Illegal to place instance fmc_imageon_hdmi_in_0_clk_pin_BUFGP/BUFG on site D18 ["C:/Users/cwilson/Documents/Projects/Zedboard-FMC-IMAGEON/Zed-FMC_IMAGEON/Zed-FMC_IMAGEON.srcs/sources_1/edk/proc_module/data/proc_module.ncf":34]
"

In the UCF for the Project:

NET "fmc_imageon_hdmi_in_0_clk_pin"                LOC = "D18"; # HDMII_LLC   - FMC1-G2  (CLK1_M2C_p)

NET fmc_imageon_hdmi_in_0_clk_pin TNM_NET = hdmii_clk;
TIMESPEC TS_hdmii_clk = PERIOD hdmii_clk 148500 kHz;

I really have no clue what to do here...Has anyone come across this issue? Did you just demote the error to a warning?

Thanks!

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  • Former Member
    0 Former Member over 13 years ago

    I'm also looking at bringing in an external clock from the FMC to the Zynq, and sending a clock from the Zynq to the FMC, which pins should I use?

    I looked at the documentation and it shows that the MRCC and SRCC are multi function clock capable input pins, does this mean that they can only be used for input from the FMC to the Zynq?

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  • Former Member
    0 Former Member over 13 years ago

    I'm also looking at bringing in an external clock from the FMC to the Zynq, and sending a clock from the Zynq to the FMC, which pins should I use?

    I looked at the documentation and it shows that the MRCC and SRCC are multi function clock capable input pins, does this mean that they can only be used for input from the FMC to the Zynq?

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  • Former Member
    0 Former Member over 13 years ago in reply to Former Member

    The RMCC and SRCC pins link to regional and global clocking resources, which are bi-directional and thus can be used as both input or output (not bidirectional in the same design).

    You can pull the clock into the PL using a CC pin, or drive a clock out using a CC pin.

    Does that answer your question?

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  • Former Member
    0 Former Member over 13 years ago in reply to Former Member

    Yes that does answer my question, I can use MRCC or SRCC pins in a design to either pull in a clock to PL or drive out a clock from PL. Thanks.

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