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Power on Sequencing

arjunbk09

Hello,
  We are working on Zynq-7020, In data sheet Ds-187 the power-on sequence is specified as VCCINT,VCCBRAM-> VCCAUX->VCCO and power-off sequence should be exactly in reverse order of power-on sequnce. But in Zedboard Hardware user guide On-Off sequencing wave form it is shown that all the voltages are ramped down at a time.Can anybody please tell me is there any problem if all the voltages are ramped down at a time.
                                           Thank you

  • 0

    Hi,

    The short answer is no, there isn't a problem shutting down all the supplies at the same time.

    Proper startup sequencing ensures minimal current draw during startup.  There is only one condition that could result in damage to the device, if any Vcco bank exceeds Vccaux by more than 2.625V for longer than 500ms during a power cycle.  One power cycle equals a start up and shut down.

    Since we sequence up the supplies as recommended, the only way damage would occur is if the 3.3V rail stayed powered for more than 500ms after Vccaux goes away.  That condition will not be violated on this board.

    Shut down sequencing is harder to do if you don't have a rail that stays up after system power is cut.  In most cases shutting down all the rails together is acceptable, just be sure to follow start up sequencing so that you don't violate the condition mentioned above.
    Thanks
    Chris

  • 0

    In data sheet Ds-187 the power-on sequence is specified asu201C
    The recommended power-on sequence is VCCPINT
    , VCCPAUX and VCCPLL together, then the PS VCCO supplies (VCCO_MIO0, VCCO_MIO1, and VCCO_DDR) to achieve minimum current draw and ensure that the I/Os are 3-stated at power-on. u201DI want to know which case is right:1.0V VCCPINT->1.8V
    (VCCPAUX and VCCPLL)->3.3V VCCO or (1.0V VCCPINT,1.8V
    (VCCPAUX and VCCPLL))->3.3V VCCO. Thanks!