Hi,
My name is Hector A. Ochoa, I am starting to work with FPGAs and I am really far from been an expert. I want to implement an added using the Floating Point (FP) IP located in the Vivado IP Catalog. After some research I find out that the FP IP requires an AXI4-Stream connection. After looking some time and reading a couple of application notes I found this document
http://www.xilinx.com/support/documentation/application_notes/xapp1170-zynq-hls.pdf?
After analyzing the code I realize that I can use a DMA to transfer the data from the PS to the FP IP. The problem that I am having is transferring the data to the DMA block. Below you can see pictures of my SDK running the code and the Vivado Block design.
The DMA is initializing properly, I am flushing the cache before sending the data. When I use the instruction u201CXAxiDma_SimpleTransferu201D to transfer the values from the variable u201CAu201D to the DMA, the status return as u201C15u201D failing to transfer the data. Can someone provide some help understanding what I am doing wrong?
I am working with:
Windows 7
Vivado 13.4
SDK 13.4
AXI DMA (IP Catalog)
Floating Point IP (IP Catalog)
Thanks in advance for all your help.
Hector
Images:
Code: https://www.dropbox.com/s/dlsjoptby0p89tk/floting%20point%20.txt?dl=0
Block Design: https://www.dropbox.com/s/lsthmiabmjku3ld/circuit%20diagram.PNG?dl=0
SDK Snapshoot: https://www.dropbox.com/s/37h5swl9778exbl/result.PNG?dl=0