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ZedBoard Hardware Design Random read/write speed OCM vs DDR
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Related

Random read/write speed OCM vs DDR

Former Member
Former Member over 10 years ago

Hi, there is my standalone code for OCM and DDR random Read/Write speed testing on zedboard:

(1) My timer functions to get CPU time, CPU@667MHz:
int timer_read() {
tint base, a;
tbase = 0xf8002000;
ta = REG_READ(base+0x18);
treturn a;
}
double timer_value(int t, double fpclk) {
t// t in timer units, fpclk in mhz
t// returns timer value in seconds
tdouble x;
tx = ((double) t) * 65536.0 / (fpclk * 1000000.0);
treturn x;
}

(2) Configure Register set about OCM
taddr_value(0xf8000910); // tttttttt slcr.OCM_CFG[RAM_HI] = 1000
taddr_value(0xf8f00000); //mpcore.SCU_CONTROL_REGISTER[Address_filtering_enable] = 1
taddr_value(0xf8f00040); //tt      mpcore.Filtering_Start_Address_Register = 0x0010_0000
taddr_value(0xf8f00044); //ttt    mpcore.Filtering_End_Address_Register = 0xffe0_0000

(3) prepare a random address offset list (stored in OCM)
tint random_offset[100] = {0x4700, 0x4300, 0x7300, 0x8600, 0x3600, 0x9600, 0x4700, 0x3600, 0x6100, 0x4600, 0x9900, 0x6900, 0x8100, 0x6200, 0x9700, 0x7400, 0x2400, 0x6700, 0x6200, 0x4200, 0x8100, 0x1400, 0x5700, 0x2000, 0x4200, 0x5300, 0x3200, 0x3700, 0x3200, 0x1600, 0x7600, 0x0200, 0x2700, 0x6600, 0x5600, 0x5000, 0x2600, 0x7100, 0x0700, 0x3200, 0x9000, 0x7900, 0x7800, 0x5300, 0x1200, 0x5600, 0x8500, 0x9900, 0x2600, 0x9600, 0x9600, 0x6800, 0x2700, 0x3100, 0x0500, 0x0300, 0x7200, 0x9300, 0x1500, 0x5500, 0x5900, 0x5600, 0x3500, 0x6400, 0x3800, 0x5400, 0x8200, 0x4600, 0x2200, 0x3100, 0x6200, 0x4300, 0x0900, 0x9000, 0x1600, 0x2200, 0x7700, 0x9400, 0x3900, 0x4900, 0x5400, 0x4300, 0x5400, 0x8200, 0x1700, 0x3700, 0x9300, 0x2300, 0x7800, 0x8400, 0x4200, 0x1700, 0x5300, 0x3100, 0x5700, 0x2400, 0x5500, 0x0600, 0x8800, 0x7700};

(4) Write/read function:
#define REG_READ(addr)
tt({int val;int a=addr; asm volatile ("ldr   %0,[%1]
" : "=r"(val) : "r"(a)); val;})

#define REG_WRITE(addr,val)
tt({int v = val; int a = addr; __asm volatile ("str  %1,[%0]
" :: "r"(a),"r"(v)); v;})


(5) Test OCM, first prepare address:
t//store random offset data in OCM block 2
tint *ocm_data_int = 0x00010000;
tfor(i = 0; i < 100 ; i++){
ttocm_data_int[i] = OCM_BASE + random_offset[i];
ttprint_addr_value(&ocm_data_int[i]);
t}


(5-1) Test OCM random write speed
        //random write 1.2GB data
ttimer_init();
tfor(j = 0; j<3145728; j++){ //2^20 = 1048576; 2^20 * 3 = 3145728
ttfor(i=0; i<100; i++){
tttREG_WRITE( ocm_data_int[i], 0xF0F00F0F);
ttt//REG_WRITE( &ocm_data_int[i]+4, 0xF0F0000F);
tt}
t}
ti = timer_read();
ttest_time = timer_value(i, pclk);
tprintf("     random write speed = %g MB/sr
", 1200.0/test_time);

(5-2) Test OCM random read speed
t// random read 1.2 GB data
tint data_int=0;
ttimer_init();
tfor(j = 0; j<3145728; j++){ //2^20 = 1048576 (*3 = 3145728)
ttfor(i=0; i<100; i++){
tttdata_int = REG_READ(ocm_data_int[i]);
tt}
t}
ti = timer_read();
ttest_time = timer_value(i, pclk);
tprintf("     random read speed = %g MB/sr
", 1200.0/test_time);


(6) Test DDR, first we should prepare address as follows:
tint DDR_BASE = 0x10020000;
t//store random offset data in OCM block 2
tfor(i = 0; i < 100 ; i++){
ttocm_data_int[i] = DDR_BASE + random_offset[i];
tt//print_addr_value(ocm_data_int[i]);
t}

(6-1) Test DDR random write speed
ttimer_init();
tfor(j = 0; j<3145728; j++){ //2^20 = 1048576 (*3 = 3145728)
ttfor(i=0; i<100; i++){
tttREG_WRITE( ocm_data_int[i], 0xF0F00F0F);
tt}
t}
ti = timer_read();
ttest_time = timer_value(i, pclk);
tprintf("     random write speed = %g MB/sr
", 1200.0/test_time);

(6-2) Test DDR random read speed
ttimer_init();
tfor(j = 0; j<3145728; j++){ //2^20 = 1048576 (*3 = 3145728)
ttfor(i=0; i<100; i++){
tttdata_int = REG_READ(ocm_data_int[i]);
tt}
t}
ti = timer_read();
tprintf("     random read time counter = %dr
", i);
ttest_time = timer_value(i, pclk);
tprintf("     random read 1.2GB time = %g secr
",  test_time);
tprintf("     random read speed = %g MB/sr
", 1200.0/test_time);


(7) Then I got the result:

     OCM random write speed = 498.653 MB/s
     OCM random read speed = 497.069 MB/s

     DDR  random write speed = 500.616 MB/s
     DDR  random read speed = 497.799 MB/s

It seems like that there is not much difference between OCM and DDR for random WRITE/READ speed.

AND!! Result shows that the speed of OCM (both write and Read ) is a little bit slower than DDR?!!!!

Or, could you figure out that if there is any other problems?

Thanks very very much!
Zeepen

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  • drozwood90
    0 drozwood90 over 10 years ago

    Hello, Have you looked at the Avnet Zynq Hardware speedway, chapter 7 lab 6?  That, with the solution file should be able to guide to to a resolution. On this page: http://zedboard.org/support/trainings-and-videos Search for: Developing ZynqRegistered-7000 All Programmable SoC Hardware (Vivado 2013.3 and 2014.4.1) It should be the second link down. --Dan

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