I got module written in VHDL and testbench for it (also VHDL). When I run Behavioral Simulation using Vivado Simulator, I got the waveform, but I am not able to set breakpoints ... because there is no breakpoint toolbar (the vertical line for toggling breakpoints is not there, just line numbers), nor right-clicking in code on executable line offers setting a breakpoint.
Using Vivado 2015.4, the project is opened in IP Packager (I am repackaging custom IP).
Am I missing something ? I have been through UG900, they just assume the breakpoint toolbar is there.
