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ZedBoard Hardware Design Matrix  multiplication in Vivado
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Matrix  multiplication in Vivado

Former Member
Former Member over 11 years ago

Hello,


I'm trying to create an ip core in HLS that takes two input matrices and outputs an other one. For this I tried to follow the xapp1170 which includes a tutorial for the ZC702 board using Planahead. I got this working on a ZC702 board but I must have it working on a zedboard rev D. (it has worked once by changing the target board to the zedboard rev C after it worked on the ZC702 but that doesn't work anymore)
Unfortunately I can't find any tutorials that do something similar on the zedboard.

Could anyone please point me in the right direction.

I would rather use Vivado instead of planahead for this because rev D is not supported on planahead even though the difference with rev C is minimal.

Thank you.

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  • Former Member
    0 Former Member over 11 years ago

    Hello Arno,

    Iu00B4m searching here bacasue Iu00B4m triyind to do the same.
    In the past i have the same example using MBlaze and Iu00B4m triying to move to zedboard.
    I was looking xapp1170 and based on this info Iu00B4m looking to use the DMA engine.
    If I solve the problems, i will share the results.

    Regards, G

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  • Former Member
    0 Former Member over 11 years ago

    Hello,

    I solved the problems and it is working...
    I was wating time with a trivial problem (the no coherence of ACP port).
    After redesign several times the Vivado and Vivado-HLS projects I add a "cache flush" in SDK and everything works.

    I will refine the code and document the steps. After that Iu00B4ll share with you.

    Regards, GS

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  • Former Member
    0 Former Member over 11 years ago

    could someone detail me the ports & access to the AXi bus in the IP designed by your "HLS" ? (multiplier)
    i guess it is AXi streaming protocol but i've been unsuccessful at using it

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  • Former Member
    0 Former Member over 11 years ago

    thank you very much gsutter. I'm looking forward to it.
    Thank you again

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  • Former Member
    0 Former Member over 11 years ago

    Dear All,

    Sorry for delay in answer. This period of year is awful for mi.
    I wrote an informal ppt with steps to implement the matrix multiplier as Zynq coprocessor:
    http://electratraining.org/matrixmul/MatrixMult_Zynq_GS_march2014.pdf

    You can download the source files from hear:
    http://electratraining.org/matrixmult/matrix_mult_zedboard_march2014.zip

    I hope helps you.

    Best Regards, GS

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  • Former Member
    0 Former Member over 11 years ago in reply to Former Member

    Hi gsutter,

    the ppt link seems not working .. Could you please fix it.

    Thanks & regards

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  • Former Member
    0 Former Member over 11 years ago

    Hi gsutter,
       Your link to the informal ppt does not seem to connect. Please fix it and share the link here.

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  • Former Member
    0 Former Member over 11 years ago

    Dear All,

    I received several email informing that the link is broken.
    something has changed in my hosting and I can not link a pdf.
    So I reupaload in zip format and a newer version (almost no change, only for version 14.1).

    The informal pdf (zipped) with steps to implement the matrix multiplier as Zynq coprocessor:
    http://electratraining.org/matrixmult/MatrixMult_Zynq_GS_june2014.zip

    You can download the source files from hear:
    http://electratraining.org/matrixmult/matrix_mult_zedboard_june2014.zip

    Sorry for delay in taking care.

    Kind Regards, GS.

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  • Former Member
    0 Former Member over 11 years ago in reply to Former Member

    Hi Gsutter,

    I can't run your instance on vivado2014.2, the tests hung before DMA initializationuFF0C I'm doubting it maybe related to AXI timer and interrupt, but I tried it, all failed, could you have a look at it?

    Thanks,
    Sanweiying

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