Hello,
I worked through the labs to create a custom PL peripherial and corresponding C code to interface with it. The clock for the PL is set to 50 MHz. I would like to change that clock to something else (like 100 MHz). I figured this had to be done in XPS (the clock configuration tool, just like initially in the labs). Changing clocks in that tool works, but back in PlanAhead, synthesis still only synthesizes for a 50 MHz target clock (it reaches a clock of 50.223 MHz and thinks all constraints are satisfied).
How can I change this to make the synthesis and implementation tools try to go to 100 MHz? The hardware
is a standard Zedboard.
Thanks in advance for any help.
