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ZedBoard Hardware Design AXI Timer not generating output
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Related

AXI Timer not generating output

Former Member
Former Member over 10 years ago

Hi,

I have implemented an AXI timer into a design with the intention of using it to generate a pulse on a specific pin on the Zedboard. I have some issues with the generateout1 not outputting a pulse when the timer reaches zero and reloads.

I have created a separate new design with just the timer and the code I am using. I have checked the register sheets for the values to set and the counter is actually counting down then issuing an interrupt which I can see on the console output. The issue is that I cannot see a pulse on the physical pin on the zedboard. I have even tried a number of different pin mappings. Have I missed something in my design?


not sure how I can get the Block design in the post, but it is pretty much hooked up as standard. The C code for the setup and running is below.

p.s I am using the Timer1 in the separate test design, I was using timer0 in my other design, hence the references to the 0 registers, but I have added the offset to the base address etc for this.

Constraints file is:

set_property PACKAGE_PIN W12 [get_ports {generateout1}]
set_property PULLUP true [get_ports {generateout1}]
set_property IOSTANDARD LVCMOS33 [get_ports {generateout1}]


Thanks
James



#include <stdio.h>
#include "xparameters.h"
#include "xtmrctr.h"
#include "xscugic.h"


XScuGic InterruptController;


static unsigned int tmpreg;
static XScuGic_Config *IntcConfig;


void TimerInterruptHandler(void)
{

tu32 tmpreg;
t//TMCSR.T0INT = 1 - Clear the interrupt
ttmpreg = Xil_In32(XPAR_AXI_TIMER_0_BASEADDR + 0x10);
txil_printf("Read INTR Reg : %x r
",tmpreg);
ttmpreg = tmpreg | 0x100;
tXil_Out32(XPAR_AXI_TIMER_0_BASEADDR + 0x10,tmpreg);
txil_printf("Clear INTR Reg Bit : %x r
",tmpreg);
ttmpreg = Xil_In32(XPAR_AXI_TIMER_0_BASEADDR + 0x10);
txil_printf("Final Value of Register after Interrupt : %x r
",tmpreg);

}


int InterruptSystemSetup(XScuGic *XScuGicInstancePtr)
{
tXil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,(Xil_ExceptionHandler)XScuGic_InterruptHandler,XScuGicInstancePtr);
tXil_ExceptionEnable();
treturn XST_SUCCESS;
}

int IntcInitFunction(u16 DeviceId)
{

tint status;

ttt// Interrupt controller initialisation
tttIntcConfig = XScuGic_LookupConfig(DeviceId);
tttstatus = XScuGic_CfgInitialize(&InterruptController, IntcConfig, IntcConfig->CpuBaseAddress);
tttif(status != XST_SUCCESS) return XST_FAILURE;

ttt// Call to interrupt setup
tttstatus = InterruptSystemSetup(&InterruptController);
tttif(status != XST_SUCCESS) return XST_FAILURE;


ttt// Connect timer interrupt to handler
tttstatus = XScuGic_Connect(&InterruptController,
tttttttttttt 61,
tttttttttttt (Xil_ExceptionHandler)TimerInterruptHandler,
tttttttttttt NULL);
tttif(status != XST_SUCCESS) return XST_FAILURE;


tttXScuGic_Enable(&InterruptController, 61);



tttreturn XST_SUCCESS;
}



int main()
{


t //----------------------------------------------------
t // SETUP THE TIMER
    //----------------------------------------------------
t//TCSR0.ENIT0t=t1t- Enable the interrupt
t//TCSR0.GENT0t=t1t- Enable the Generate Output
t//TCSR0.UDT0t=t1t- Set Down Counter
t//TCSR0.MDT0t=t0t- Set Timer to Generate

tunsigned int tmrval;
ttmpreg = Xil_In32(XPAR_AXI_TIMER_0_BASEADDR + 0x10);
txil_printf("Setup : Read Reg : %x r
",tmpreg);
ttmpreg = tmpreg | 0x56;
tXil_Out32(XPAR_AXI_TIMER_0_BASEADDR  + 0x10, tmpreg);
txil_printf("Setup : Setup REG Bits : %x r
",tmpreg);
tIntcInitFunction(XPAR_TMRCTR_0_DEVICE_ID);
t//Load Value into TLRO
ttmrval = 0x495C0C6;
tXil_Out32(XPAR_AXI_TIMER_0_BASEADDR + 0x14, tmrval);
t//TCSR0.LOAD0t=t1t- Set the load bit to load TCR0 with TCLR
ttmpreg = Xil_In32(XPAR_AXI_TIMER_0_BASEADDR + 0x10);
txil_printf("Setup : Read reg : %x r
",tmpreg);
ttmpreg = tmpreg | 0x20;
tXil_Out32(XPAR_AXI_TIMER_0_BASEADDR + 0x10, tmpreg);
txil_printf("Setup : Enable load bit : %x r
",tmpreg);
t//TCSR0.LOADt=t0t- Set the load bit to clear the LOAD register
t//TCSR0.ENT0t=t1t- Enable the timer.
ttmpreg = tmpreg ^ 0xA0;
tXil_Out32(XPAR_AXI_TIMER_0_BASEADDR + 0x10, tmpreg);
txil_printf("Setup : Clear Load Bit Set ENB Bit : %x r
",tmpreg);
t//Set up interrupt handler for Timer
tIntcInitFunction(XPAR_TMRCTR_0_DEVICE_ID);
txil_printf("Finished Setupr
");

twhile(1);

    return 0;
}

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  • Former Member
    0 Former Member over 10 years ago

    Not sure what the issue is but you might want to verify that your constraints file is working correctly, perhaps by defining two pins and setting one high and one low, if you are not sure it is working correctly. Also not sure why you would enable a pullup on a pin you defined as LVCMOS33.

     

    You can start with the ZedBoard master constraints file if you like. It can be downloaded here:

    http://zedboard.org/support/documentation/1521

     

    If this is not the source of the problem please give us a little more information. What version of Xilinx tools are you using, what host OS, etc.

     

    Pasting a screenshot of your block diagram should work if you use the FireFox browser when you reply. We are having issues pasting images using Chrome at this point.

     

    -Gary

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