When we use vivado to design circuit,it will give us the IP of the custom pl part assignning a baseaddress. For example #define XPAR_MYIP_0_S00_AXI_BASEADDR 0x43c00000 the baseaddress is what to do and do baseaddress+offsetaddress access to IP's each register?? if it's ture ,cpu accesses to ip's register directly or in a mapping to memory way?? Hope to help solve
