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ZedBoard Hardware Design DDR3 CKE recommendation
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DDR3 CKE recommendation

bhfletcher
bhfletcher over 13 years ago

Xilinx has recently changed their recommendation for DDR3 CKE.  ZedBoard Rev C implements a 4.7K-ohm pulldown to GND.  The new recommendation is a 40-ohm pull-up to Vtt.

The Micron spec only requires CKE to be low 10ns before RESET#, unlike DDR2 where the term was longer. Since the Zynq controller drives CKE low, that 10ns requirement is met.  The termination to VTT could be important for self-refresh users, as CKE will toggle more often than just startup. The 4.7K pulldown may lead to poor SI on this potentially high-frequency signal.

Bryan

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  • jafoste4
    jafoste4 over 8 years ago +1
    Hello Sercan_Egilmezkol, 1. That is correct, the Zedboard only has DDR3 memory accessible through the PS. There is no DDR3 memory accessible through the PL using a MIG IP. 2. This is also correct. The…
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  • jafoste4
    0 jafoste4 over 8 years ago

    Hello Sercan_Egilmezkol,

    1. That is correct, the Zedboard only has DDR3 memory accessible through the PS. There is no DDR3 memory accessible through the PL using a MIG IP.

    2. This is also correct. The Zynq device does not limit the DDR3 memory to being accessed only through the PS. This just happened to be the setup that was chosen for the Zedboard. If you refer to the Mini_ITX hardware user guide you will see that we have DDR3 memory located on both the PS and PL side of the Zynq Device. http://zedboard.org/support/documentation/2056

    --Josh

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  • jafoste4
    0 jafoste4 over 8 years ago

    Hello Sercan_Egilmezkol,

    1. That is correct, the Zedboard only has DDR3 memory accessible through the PS. There is no DDR3 memory accessible through the PL using a MIG IP.

    2. This is also correct. The Zynq device does not limit the DDR3 memory to being accessed only through the PS. This just happened to be the setup that was chosen for the Zedboard. If you refer to the Mini_ITX hardware user guide you will see that we have DDR3 memory located on both the PS and PL side of the Zynq Device. http://zedboard.org/support/documentation/2056

    --Josh

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