Hi all,
I am considering using the Avnet Zedboard and AD-FMCOMMS1-EBZ FMC Module for my
SDR implementation research project.
The above board recommends the use of tools like Xilinx Vivado with XPS and SDK and
Mathlab Simulink for sub system design and simulation.
I am curious to check if I can use Readhawk SDR framework for building my radio
subsystem and simulating the same instead of Simulink.
Questions:
1. Does Xilinx System generator support or is compatible Redhawk SDR frame work
support the autocode generation of NETLIST for the above board ?
2. If not what kind of NETLIST does Redhawk support?
3. Any pointers to the documentation on how to obtain the NETLIST for RedHawk SDR
frame work is greatly appreciated. I do not see Redhawk SDR active community.
4. Do you suggest any other work around to generate the desired NETLIST for the
target board ? For example any other software etc.,
Also, any knowledge sharing in this line is greatly appreciated.
Thank you,
