Hello guys~
I designed a SPI design and connected to PL(EMIO).
Because I am using zedboard and PMOD module from Maxim.(SPI module)
But my design doesn't work, so I am checking what I have done.
I found 6pins of SPI pin declaration, but I am not sure I did make a good connection to physical pin.
1. Could you let me know which pin should be connected with SS, MOSI, MISO, SCK?
(*)I am using only 1 SPI as a master mode.
spi_0_io0_io : inout STD_LOGIC;
spi_0_io1_io : inout STD_LOGIC;
spi_0_sck_io : inout STD_LOGIC;
spi_0_ss1_o : out STD_LOGIC;
spi_0_ss2_o : out STD_LOGIC;
spi_0_ss_io : inout STD_LOGIC
2. Should I have to set and enable every pin using "set direction and discrete write" funtion?
3. In the middle of debugging, I found my process is pending, actually wait for transaction permanetly..
Could it be a result of wrong pin connection?
*part of code
-----------------------------------------------------
//Wait for transaction to complete. Check to see if Tx_Empty flag is set before proceeding.
ttwhile( !(XSpiPs_ReadReg( unPeripheralAddressSPI, 0x64 ) & 0x00000004));
------------------------------------------------------
*whole code
int SpiRW( u32 unPeripheralAddressSPI, unsigned int unCPHA, unsigned int unCPOL, u8* auchWriteBuf, u8* auchReadBuf, int unNumBytes, u8 uchCsActiveHigh )
/**
* brief Perform a SPI read or write.
* par Details
* This function provides a combination SPI Read and Write to the chosen SPI port in the design
* CPHA and CPOL can be set to 0 or 1
* Pointers are provided to u8 buffers containing the data to be written and received
* Data in the auchWriteBuf will be clocked out (MSB first) onto the MOSI pin
* Data from the MISO pin will be placed into the auchReadBuf
* uchCsActiveHigh==TRUE allows SS configurations to be used
* uchCsActiveHigh==FALSE allows SS# configurations to be used
*
* param[in] unPeripheralAddressSPI - @help
* param[in] unCPHA - phase of SCK (edge to trigger on). 0=Leading edge, 1=Trailing edge
* param[in] unCPOL - polarity of SCK. 0=Active high, 1=Active low
* param[in] auchWriteBuf - pointer to write data buffer
* param[in] auchReadBuf - pointer to read data buffer
* param[in] unNumBytes - number of bytes to transfer
* param[in] uchCsActiveHigh - polarity of slave select 0=active low, 1=active high
*
* retval Always returns 0
*/
{
tint i;
tunsigned int unControlData = 0x00000186;
t//If CPHA or CPOL = 1, we need to set the corresponding bits in the control register
tunControlData = unControlData | (unCPHA << 4);
tunControlData = unControlData | (unCPOL << 3);
t//Write config data to SPICR. We need the inhibit bit=1.
tXSpiPs_WriteReg(unPeripheralAddressSPI, 0x60, unControlData);
t//Deassert CS to 1 to ensure SPI slave is inactive
tif( uchCsActiveHigh )
ttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x70, 0xFFFFFFFE);
telse
ttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x70, 0xFFFFFFFF);
tfor( i = 0; i < unNumBytes; i++)
t{
ttif( auchWriteBuf != 0 )
tt{
ttt//Write data to SPIDTR. This is the data that will be transferred to the SPI slave.
tttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x68, auchWriteBuf[ i ]);
ttt//Debug//printf( "Write %02x; ", auchWriteBuf[i]);
tt}
ttelse
tt{
ttt//Write data to SPIDTR. This is the data that will be transferred to the SPI slave.
tttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x68, 0x00);
tt}
tt//Write config data to SPICR. We need the inhibit bit=1.
ttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x60, unControlData);
tt//Assert CS for our PMOD part
ttif( uchCsActiveHigh )
tttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x70, 0xFFFFFFFF);
ttelse
tttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x70, 0xFFFFFFFE);
tt//Un-inhibit our SPI master to transfer the data
ttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x60, unControlData & 0xFFFFFEFF);
ttprintf( "Read %02xr
", XSpiPs_ReadReg( unPeripheralAddressSPI, 0x64 ));
tt//Wait for transaction to complete. Check to see if Tx_Empty flag is set before proceeding.
ttwhile( !(XSpiPs_ReadReg( unPeripheralAddressSPI, 0x64 ) & 0x00000004));
tt//Inhibit SPI master to prevent further action
ttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x60, unControlData);
tt//Read received data
ttif( (auchReadBuf != 0) )
tt{
tttauchReadBuf[ i ] = XSpiPs_ReadReg(unPeripheralAddressSPI, 0x6C);
ttt//Debug//printf( "Read %02xr
", auchReadBuf[i]);
tt}
t}
tif( uchCsActiveHigh )
ttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x70, 0xFFFFFFFE);
telse
ttXSpiPs_WriteReg(unPeripheralAddressSPI, 0x70, 0xFFFFFFFF);
treturn 0;
}
