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Zedboard Ethernet Issues with Xilinx Virtual Cable

lisa.rougeau

Hello,

 

I am attempting to use the Xilinx Virtual Cable (XVC) tool with a Zedboard. I have followed the instructions in the application note (XAPP1251 Xilinx Virtual Cable Running on Zynq-7000 Using the PetaLinux Tools) in which they use the MicroZed instead of a Zedboard to run the XVC tool. I believe I should be able to make minor modifications to use this with the Zedboard instead but I am running into issues with the Ethernet connection when I am in the Hardware Manager of Vivado attempting to locate the target board. 

 

I am in one of the final steps of the app note steps but I am getting the error seen below when trying to open the hw target:

 

open_hw_target -xvc_url 192.168.0.115:2542
ERROR: [Labtools 27-3094] Timeout while opening port to xvc server 192.168.0.115:2542.
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/210248531486
open_hw_target: Time (s): cpu = 00:00:03 ; elapsed = 00:00:32 . Memory (MB): peak = 661.152 ; gain = 0.000
ERROR: [Common 17-39] 'open_hw_target' failed due to earlier errors.

 

I suspect that since the Zedboard uses a slightly different PHY, there is something I need to modify to allow the example project to work on the Zedboard. I believe the modifications may need to be made in the system-top.dts file (copied below for reference) but I am not sure what needs to be changed or if that is even the right place to look to solve this error.

 

/dts-v1/;
/include/ "system-conf.dtsi"
/ {
};

&gem0 {
phy-handle = <&phy0>;
ps7_ethernet_0_mdio { 
#address-cells = <1>;
#size-cells = <0>;
phy0: phy@0 {
compatible = "marvell,88e1510";
device_type = "ethernet-phy";
reg = <0x0>;
marvell,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;

};
};
};

 

I have also noticed problems when running ifconfig in the linux terminal that further strengthen my suspicion that something is going wrong with the PHY. I have pasted the ifconfig results below as well.

 

root@xvc_linux:~# ifconfig
eth0         Link encap:Ethernet HWaddr 00:0A:35:00:E4:2D
UP BROADCAST RUNNING MULTICAST MTU:1500 Metric:1
RX packets:54 errors:1 dropped:1 overruns:0 frame:0
TX packets:7 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:7078 (6.9 KiB) TX bytes:1638 (1.5 KiB)
Interrupt:54 Base address:0xb000

 

lo       Link encap:Local Loopback
inet addr:127.0.0.1 Mask:255.0.0.0
inet6 addr: ::1/128 Scope:Host
UP LOOPBACK RUNNING MTU:65536 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:0
RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)

 

 

 

Any help would be greatly appreciated!

-Lisa Rougeau

  • 0

    Hi Lisa,

    I am going to suggest you ask for help over at the Xilinx forum. They are the creators of that document and owners of the IP you a refering to. Unfortunatly we do not have much experience with it.

    https://forums.xilinx.com/

    --Josh

  • 0 in reply to jafoste4

    I definitely understand that and have asked on their forum as well. I was hoping that someone on this forum would at least be able to say if they saw anything wrong with the system-top.dts file that I copied into my original post as that was written for a Microzed but I need to modify for the Zedboard. Does anyone have insight there? I recopied the file contents below.

     

    /dts-v1/;
    /include/ "system-conf.dtsi"
    / {
    };
     
      &gem0  {
        phy-handle = <&phy0>;
        ps7_ethernet_0_mdio {   
          #address-cells = <1>;
          #size-cells = <0>;
          phy0: phy@0 {
            compatible = "marvell,88e1510";
            device_type = "ethernet-phy";
            reg = <0x0>;
            marvell,reg-init = <3 16 0xff00 0x1e 3 17 0xfff0 0x00>;
     
          };
        };
      };