Hi,
Currently I'm designing digital system for ultrasound using Zedboard Zynq platform.
One of its features is capturing high speed LVDS data. I have already implemented LVDS receiver, I mean deserialiser with synchronisation mechanism, but now I need a concept of data storage solution. I want to use Zynq features effectively but unfortunately its structure is still quite unfamiliar for me, especially Processing System part.
Some details of what I need to implement:
- deserialised data has 14-bit width with frequency of 65 MHz,
- 65 MHz aligned frame clock is provided,
- I need to capture max. 130 us "packages", so it would be: 130 us * 65 samples/us * 14 bits = 118 kb = 15 KB of data for each package.
- after receive of one 130 us package I can wait to do other tasks if needed, and when finished - start to receive and storage next 130us package data,
- I need to collect as many packages as possible.
My first (and only) idea was to receive several packages and write it to Block RAM (I assume that Zynq 7020 has 560 KB capacity of this memory) and then transfer data to external on-board DDR3 RAM through processing system beetween capturing next portion od data.
Is there better idea? What are possible simple solutions to transfer data from fabric to external DDR3 RAM? Maybe it is possible to access external RAM memory directly from fabric even without Block RAM? (DMA?) How to do that (which IP cores should I consider)?
What I need is a simple concept, idea, maybe some key-words, links, or you can mention any useful IP Cores provided in WebPack or anything helpful.
Thanks,
Damian
