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PL Power-down

Former Member

For our system, we are looking to turn off PL when not in use to extend battery life.  In the Xilinx Zynq technical reference manual, it says you can power down PL to save energy (ug585 24.2.2).  In the second paragraph it mentions u201Cu2026PL power system can be controlled via GPIO u2026u201D

How do I configure GPIO to control the PL power? 

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    Zynq has several internal power rails, split into PS and PL. For example, there is a Vccint, which is the core power for the PL, and there is also Vccpint, which is core power for the PS. Both are 1.0V. You can imagine a scenario where I have two different regulators, each driving 1.0V -- one for Vccint and one for Vccpint. With Vccpint powered and the PS alive, you could use a PS GPIO to control an enable on the Vccint regulator, thus putting PL power under full user control from a GPIO.

     

    However, this scenario obviously costs more as you need two 1.0V regulators where you could have used just one. On ZedBoard, only one 1.0V regulator is used, therefore it is not possible to power down the PL. If this is critical for your experiments, then I suggest you look at purchasing the ZC702.

     

    Bryan

  • 0

    Thanks Bryan for the explanation.  I did some research on ZC702, and looks like ZC702 has problem with powering down PL as well (http://www.xilinx.com/support/answers/50664.html).

    In either case, we are probably not going to switch the board right now. we will plan on extending battery life some other way.