Hi,
I'm working on a design which needs to read and write from DDR3. I've created a basic IP using Vivado HLS with a AXI master interface which on a button press saves the switch value in DDR and reads the last switch value from DDR and displays it on the LEDs. Then in Vivado 2013.2 I've added the Zynq7 processing system, enabled S_AXI_HP0 and used an interconnect to connect the Basic IP axi interface to axi_hp0. Everything is working apart from the DDR access.
Is there a guide or would someone be able to create a guide to using Vivado for the Zedboard with DDR3 read/write access?
Thanks
