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No Serial Communication in Basic Hello World Bare Metal Application

russty32280

Hello,

If I need to move this to another forum, please help me find which one to place it in as this problem is driving me and my co-workers insane.

I am trying to run through the basic Helloworld Bare Metal program for the Zedboard as seen in the Zedboard Reference Document "Zynq-7000 AP SoC Concepts, Tools, and Techniques" for ISE 14.5. I am using ISE 14.7 and on a computer with Windows 8.1, 64-bit.

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Now before I go any further, I am currently installing ISE 14.5 on a Windows 7 computer to try it on there, but unless there is a known problem with Windows 8, 64-bit and using the serial communication port on the zedboard or with windows and ISE 14.7, please do not recommend that I change Windows versions. I have actually gotten serial communications to work when the zedboard is running Xiliybus linux and I am able to do lots.
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My problem is that when I run through the steps to create the Application project, select the hello world project, and run the program, I get no errors within the console, however when using either the built in terminal with the SDK or putty or terraterm, the terminal remains completely blank. The connection is solid (meaning that putty does not give me a connection error) however, I have spent almost 30 hours over the past 3 days trying to figure out what is going wrong. The main chip on board does warm up, so I feel that the program is running, however it isnt communicating over the serial port.

If you can, please help as we have struggled with getting started with Xilinx SoC's and Xilinx software for literraly about a year, and we have yet to have any success with anything other than booting the Zedboard with Linux.

If you need any more information, please tell me and I will be more than welcome to give it to you.

  • 0

    I just ran through the ISE 14.5 Concepts, Tools and Techniques tutorial using PlanAhead/ISE 14.7. There are a couple of steps missing in the tutorial. On page 25, in section 2.1.2, after completing step 1 you will need to perform the 'Generate Bitstream' function (on the left under Program and Debug in the Flow Navigator) and then allow it to 'Open Implemented Design' once it completes before going to step 2 and exporting the hardware to the SDK.

     

    The other change I would suggest is to configure the JTAG interface to 'Auto Detect' in section 2.1.3 step 4.

     

    After this I was able to complete the 'Hello World' exercise and display the console on either the SDK terminal or via the USB-UART connection using Putty.

     

    -Gary

  • 0 in reply to Former Member

    Thank you so much for your help, it worked, and I changed the document to reflect what was different. I dont think you understand how much trouble we have been having for the past 9 months to even get any of the Xilinx tools or the SoC Development Boards to work.