Hi All,
We are using the Zynq-7000 All Programmable SoC/AD9361 Software Defined Radio Evalution kit. Could you provide us some help on how to see the CLK_OUT signal from the AD9361 on the ADI IIO Oscilloscope ?
Thanks ,
Kruttik a
Hi All,
We are using the Zynq-7000 All Programmable SoC/AD9361 Software Defined Radio Evalution kit. Could you provide us some help on how to see the CLK_OUT signal from the AD9361 on the ADI IIO Oscilloscope ?
Thanks ,
Kruttik a
The AD9361_CLKOUT signal is not monitored by the ADI IIO Oscilloscope.
You could use the Xilinx Vivado Logic Analyzer implemented in the Zynq PL to sample and observe that clock.
/Matt