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ZedBoard Hardware Design SPI clock
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Related

SPI clock

ashahsana
ashahsana over 12 years ago

Hello everyone,
I am using 7z020 Zedboard. I want to send/receive data using SPI through EMIO.
In the XPS , clock wizard the range of SPI clock frequency is 10-200 MHZ. I need 20 MHZ  clock but when I am changing it following line appears
"-  SPI frequency 26.000000 (MHz) should be greater than CPU_1x 111.111115 (MHz). Please select the correct SPI freuency again"
I cannot understand whats the problem?
Lets take 166 MHZ frequency and in the ucf file my pin assignment is as follows
NET "axi_spi_0_MISO_pin" LOC = E21;
NET "axi_spi_0_MOSI_pin" LOC = M21;
NET "axi_spi_0_SCK_pin" LOC = L18;
NET "axi_spi_0_SS_pin" LOC = F18;

but no signal appears at SCK_pin.
Is this a continuous signal or it will appear only on demand.?

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  • Former Member
    0 Former Member over 12 years ago

    Take a look at section 17 of the Zynq Technical Reference Manual, UG585: 

    http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf

     

    The SPI Reference clock must be greater than the CPU_1x clock, but in TRM section 17.4.2 it explains how to divide the SPI Ref Clock to generate the desired SCLK frequency.

     

    The SCLK signal will only be driven by the Zynq device if you program the SPI Controller to be in Master Mode and then only when data is being transferred.

     

    -Gary

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