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ZedBoard Hardware Design Optimizing Boot Time
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Optimizing Boot Time

Former Member
Former Member over 12 years ago

Iu2019m trying to minimize bare metal boot time using QSPI flash on a Zedboard, Rev C.  Using a scope, Iu2019ve verified the QSPI SCLK is running at 100 MHz.  At that speed, the boot time should be less than 100 msec (Boot ROM + FSBL + PL + PS) but Iu2019m measuring close to 600 msec.  Monitoring the CS signal on the flash device I see what appears to be many 8 clock cycles of data transfer then a pause of 100 nsec after each one.  In addition to these pauses is a periodic delay of around 6 usec and a several pauses in the 50 msec range.  What are these delays?  Is there something in the FSBL that can be adjusted to remove them?
tt
Thanks for your help!
Clay

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  • Former Member
    0 Former Member over 12 years ago

    Worked with Xilinx support to resolve this. It turns out that it is related to the QSPI device size. There is a workaround if you can live with only 16 MB of QSPI space. Here is the response from Xilinx support:

     

    I've dug deeper into this issue and the performance is related to the larger QSPI device.  Once a part goes beyond the 16MB boundary, we have to access it in IO mode, not linear due to the 24 bit address limit in our QSPI controller.

     

    If the customer image is below 16MB, there is a code change in qspi.c that can be done to trick the driver.   After line 419, you can add:

    QspiFlashSize = FLASH_SIZE_128M;

     

    That will keep the driver in linear mode and drop boot time.   I've verified this in my mcs.  I'll be writing up an AR on this next week detailing what all is going on.

     

    -Gary

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  • Former Member
    0 Former Member over 12 years ago

    Worked with Xilinx support to resolve this. It turns out that it is related to the QSPI device size. There is a workaround if you can live with only 16 MB of QSPI space. Here is the response from Xilinx support:

     

    I've dug deeper into this issue and the performance is related to the larger QSPI device.  Once a part goes beyond the 16MB boundary, we have to access it in IO mode, not linear due to the 24 bit address limit in our QSPI controller.

     

    If the customer image is below 16MB, there is a code change in qspi.c that can be done to trick the driver.   After line 419, you can add:

    QspiFlashSize = FLASH_SIZE_128M;

     

    That will keep the driver in linear mode and drop boot time.   I've verified this in my mcs.  I'll be writing up an AR on this next week detailing what all is going on.

     

    -Gary

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