Hi, all.
I have a problem in implementing a custom ip in EDK.I use the CIP(Create or Import Peripheral) wizard to create a custom ip which have a AXI Lite Slave interface. In user_logic.vhd file, I want to instantiate my own module. For example, in user_logic.vhd file, I want to add a Block RAM in my design, so I have to instantiate a Block RAM named mem_1024.vhd. The mem_1024.vhd is created by Core Generator.
But when bit stream generation, error appears that the mem_1024 module can't be resolved.
So, how can I do this?
Thanks!
