The ZedBoard Rev. D.2 Errata has been updated. The updated document can be found here:
http://zedboard.org/support/documentation/1521
The signal enable for the buffer driving the JTAG FMC-TCK signal to the FMC connector is not connected.
Applications Affected
There are no known field failures due to this issue. However, it is listed here for designers referencing the Rev D ZedBoard schematics and layout, and those users that might wish to add the enable signal to their board.
Description
There is an error in the circuit shown on page 2, section C2, of the ZedBoard schematic. In the schematic the enable line for the IC1B, a buffer intended to drive the JTAG TCK signal on the FMC connector if the FMC-PRSNT signal is active, is shown as pin 1 of IC1. The actual enable line for that buffer should be pin 4, which is not connected. As a result pin 4 of the buffer is floating on the board. The buffer seems to be enabled and passing the JTAG clock independent of the presence of an FMC card.
Workaround
Add a wire from IC1 pin 1, the FMC-PRST signal, to IC1 pin 4 to correct the error if functional issues arise.
-Gary