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ZEDBoard FMC TCK Tristate buffer enable

Former Member

I think I found an error in the IC1B Tri-state buffer for the TCK JTAG signal routing to the FMC port.

The enable signal for the part B of the 74LCX125BQX Tri-state buffer has a pin# of 1 on the schematic.  This is incorrect.  This gate should have its enable on pin#4.

I think I have traced this on the PCB as well, so I don't think this is just an error on the schematic.  It is hard to check this for sure without the Altium file.  Pin 4 is floating as far as I can tell.   But could someone check this for me.

Thx

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    Hi psydway,

    You are correct, it is a bug in the schematic and pin 4 is indeed floating on the board. The buffer seems to be enabled and passing the JTAG clock independent of the presence of an FMC add-on. Although the behavior with a floating OE in undefined, on all the boards we looked at the buffer was enabled. If you are having functional issues, you might want to jump wire pins 1 and 4.