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ZedBoard Hardware Design PL access to PS memory in Linux
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Related

PL access to PS memory in Linux

richw42
richw42 over 13 years ago

I have a c++ application that I'm planning to port to zynq. I would like to implement one of the c++ functions in hardware. However, this function accesses c++ class properties and dereferences pointers. I assume that if I do this naively, it will be a disaster, because the pointers will have virtual addresses and the PL module will access DDR physical addresses.
Is there any way for a hardware module in the PL to access DDR memory which is being managed by Linux?
(I anticipate that most of the 512MB may need to be accessed by the PL for this to work)

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  • Former Member
    0 Former Member over 13 years ago

    Be aware that Linux can give any physical address to any thread at any time.
    Which is way I do it the other way around:

    I give only 500MB to Linux (bootarg mem=500m), so the other 12MB can be read and written by the FPGA.
    You can still access the area using the mmap() system call.

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  • richw42
    0 richw42 over 13 years ago

    I guess what this means is that I need to give Linux an absolute minimum of memory, and then override new() with a function that allocates physical memory. Then all pointers refer to a physical address, and the PL code can freely dereference pointers.

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  • Former Member
    0 Former Member over 13 years ago

    Speaking strictly from a system point of view, you need to distinguish between kernel level and user level. Physical addresses are the purview of device drivers, running in kernel mode. User apps understand only virtual address space, managed by the memory manager in the kernel.

    Speaking to embedded Linux in general, the device tree blob loaded by Uboot describes the memory space, including memory mapped devices.

    To your question in particular, I know very little at this point about the Zynq, AXI, and their implementation on the Zedboard. However, it's almost certain that the PS retains control of the SDRAM bus. The PL would access memory through DMA on the peripheral bus, however that's done. The PL can be built as master or slave; the driver would be written accordingly.

    Memory mapped control registers are simpler to build, and very suitable for smaller transfers.

    That's a lot of concepts, and a lot of reading to do. You might start with reading the GPIO drivers as an introduction to control registers and kernel modules. The VGA driver is a likely place to look for how DMA transfers are managed. Dig through the details of both their PL implementations, and how the drivers communicate with the peripheral bus.

    Wouldn't it be wonderful if someone had already written a book?

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  • Former Member
    0 Former Member over 13 years ago

    For the first paragraph: A pointer in the kernel also does not have physical address.
    To access the hardware in the kernel you do need to call ioremap().

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