Does anybody have a Buildroot & u-boot defconfig for the ZUB1CG rev 1 board?
Thanks
Does anybody have a Buildroot & u-boot defconfig for the ZUB1CG rev 1 board?
Thanks
I don't know if this will help but I save my instructions for booting linux on the ZUBoard here:
Hi yes I am actually looking for buildroot defconfig whereas you have used Petalinux. But even petalinux based binaries did not work on mine so i may get some insight from your repo. thanks very much
Getting these errors (I am using Vivado 2022.1) :
****** Vivado v2022.1 (64-bit)
**** SW Build 3526262 on Mon Apr 18 15:47:01 MDT 2022
**** IP Build 3524634 on Mon Apr 18 20:55:01 MDT 2022
** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
source setup.tcl
# close_project -quiet
# file delete -force proj.xpr *.os *.jou *.log proj.srcs proj.cache proj.runs
# create_project -part xczu1cg-sbva484-1-e -force proj
# set_property target_language Verilog [current_project]
# set_property default_lib work [current_project]
# load_features ipintegrator
# read_ip ../source/zmod_test/zmod_ila/zmod_ila.xci
WARNING: [IP_Flow 19-395] Problem validating against XML schema: : Unexpected end of message
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/tools/2022.1/Vivado/2022.1/data/ip'.
ERROR: [IP_Flow 19-8166] Failed to verify json document against the schema 'xilinx.com:schema:json_instance:1.0'.
{
"additionalProperties": {
"disallowed": "enabled",
"instanceRef": "#/ip_inst/parameters/component_parameters/C_TIME_TAG_WIDTH/0",
"schemaRef": "file:///param_value_v1_0.json#/definitions/param_value"
}
}
CRITICAL WARNING: [IP_Flow 19-979] Failed to recreate IP instance 'zmod_ila'. Error setting original project options.
WARNING: [Vivado 12-13651] The IP file '/proj/zub_hdlguy/source/zmod_test/zmod_ila/zmod_ila.xci' has been moved from its original location, as a result the outputs for this IP will now be generated in ''. Alternatively a copy of the IP can be imported into the project using one of the 'import_ip' or 'import_files' commands.
ERROR: [Common 17-39] 'read_ip' failed due to earlier errors.
while executing
"read_ip ../source/zmod_test/zmod_ila/zmod_ila.xci"
(file "setup.tcl" line 12)
INFO: [Common 17-206] Exiting Vivado at Fri Nov 29 13:55:31 2024...
****** Vivado v2022.1 (64-bit)
**** SW Build 3526262 on Mon Apr 18 15:47:01 MDT 2022
**** IP Build 3524634 on Mon Apr 18 20:55:01 MDT 2022
** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.
source compile.tcl
# close_project -quiet
# open_project proj.xpr
INFO: [filemgmt 56-3] Default IP Output Path : Could not find the directory '/proj/zub_hdlguy/implement/proj.gen/sources_1'.
Scanning sources...
Finished scanning sources
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1704] No user IP repositories specified
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository '/tools/2022.1/Vivado/2022.1/data/ip'.
ERROR: [IP_Flow 19-8166] Failed to verify json document against the schema 'xilinx.com:schema:json_instance:1.0'.
{
"additionalProperties": {
"disallowed": "enabled",
"instanceRef": "#/ip_inst/parameters/component_parameters/C_TIME_TAG_WIDTH/0",
"schemaRef": "file:///param_value_v1_0.json#/definitions/param_value"
}
}
CRITICAL WARNING: [IP_Flow 19-979] Failed to recreate IP instance 'zmod_ila'. Error setting original project options.
ERROR: [Common 17-39] 'open_project' failed due to earlier errors.
while executing
"open_project proj.xpr"
(file "compile.tcl" line 4)
INFO: [Common 17-206] Exiting Vivado at Fri Nov 29 13:55:41 2024...