PCIe PIO Demo
This reference design demonstrates how to use the Xilinx PCIe endpoint IP core in PIO mode (Gen 2x1). Device Driver and GUI app are provided to interact with PCIe hardware. Software can control onboard LEDs and monitor button status.
PCIe PIO Demo
This reference design demonstrates how to use the Xilinx PCIe endpoint IP core in PIO mode (Gen 2x1). Device Driver and GUI app are provided to interact with PCIe hardware. Software can control onboard LEDs and monitor button status.
