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Documents Analog Devices: AD9250-250EBZ Evaluation Board for AD9250 Dual Analog-to-Digital Converter
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  • Author Author: atomar
  • Date Created: 11 Mar 2013 9:48 AM Date Created
  • Last Updated Last Updated: 27 Oct 2013 5:49 AM
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Analog Devices: AD9250-250EBZ Evaluation Board for AD9250 Dual Analog-to-Digital Converter

BUY NOWBUY NOWSoftware ToolsTechnical DocumentsVideoFeaturesKit Contents

 

 

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Kit Overview

 

The AD9250-250EBZAD9250-250EBZ is the AD9250AD9250 evaluation board that can be used to evaluate Analog Devices Inc high speed AD9250-250AD9250-250 ADC.The AD9250-250EBZAD9250-250EBZ  board and companion HSC-ADC-EVALDZHSC-ADC-EVALDZ high-speed data capture card comprise a signal performance-optimized complete evaluation system for the AD9250-250AD9250-250. The captured data can be analyzed using a laptop computer and ADI’s free VisualAnalogTm software.

 

The AD9250AD9250 is a dual, 14-bit ADC with sampling speeds of up to 250 MSPS. The AD9250AD9250 is designed to support communications applications where low cost, small size, wide bandwidth, and versatility are desired.

 

The ADC cores feature a multistage, differential pipelined architecture with integrated output error correction logic. The ADC cores feature wide bandwidth inputs supporting a variety of user selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compensate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance. The JESD204B high speed serial interface reduces board routing requirements and lowers pin count requirements for the receiving device.

 

Flexible power-down options allow significant power savings, when desired. Programmable overrange level detection is supported for each channel via the dedicated fast detect pins. Programming for setup and control are accomplished using a 3-wire SPI-compatible serial interface.

 

Key Applications: Diversity radio systems, Multimode digital receivers (3G) TD-SCDMA, WiMax, WCDMA, CDMA2000, GSM, EDGE, LTE, DOCSIS 3.0 CMTS upstream receive paths, HFC digital reverse path receivers, I/Q demodulation systems, Smart antenna systems, Electronic test and measurement equipment, RADAR receivers, COMSEC radio architectures, IED detection/jamming systems, General-purpose software radios, Broadband data applications.

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imageMore Analog Devices Analog Development KitsimageAnalog Devices MCU based Development Kits
imageDevelopment Platforms & Kitsimageelement14 Knode

 

Software Tools


VisualAnalogTm Converter Evaluation Tool

VisualAnalog is a new way to test and characterize data converters, ADCs, and DACs alike. It provides the ability to customize the tests in a nearly limitless manner using a simple graphical user interface. VisualAnalog interfaces seamlessly with the DAC pattern generator (DPG) for DAC evaluation and the following ADC data capture boards for ADC evaluation:

  • HSC-ADC-EVALA
  • HSC-ADC-EVALB
  • HSC-ADC-EVALCHSC-ADC-EVALC
  • HSC-ADC-EVALDZHSC-ADC-EVALDZ
SPIController - High Speed ADC SPI Control Software

The high speed ADC SPI program allows the user to control advanced features on high speed, analog-to-digital converters (ADC) with SPI capability. This advanced controller program is used in conjunction with the high speed data capture boards and and specific device evaluation boards to manipulate and control SPI-accessible features. The SPI Controller program can run as a standalone application on a Windows platform, or in conjunction with any available data analysis tool, such as VisualAnalogTm or ADC AnalyzerTm.

 

The software includes advanced features to ensure a smooth transition from evaluation into prototyping and production. When a desired configuration is attained, the program includes a C-code generator that provides compatible C source code that can be incorporated into customer-developed software. For users without an available microcontroller, the software also includes an assembly code generator that produces code targeted for the ultralow cost PIC12F629 microcontroller.

 

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Technical Documents


Learning Center

 

TypeDescription
User GuideADI: User Guide (UG-493) for Testing the AD9250/AD6673 ADC Evaluation Boards Using the HSC-ADC-EVALDZ FPGA-Based Capture Board
User GuideADI: Quick Start Guide for AD9250 Evaluation Board
DatasheetADI: Datasheet for AD9250 14-Bit, 170 MSPS/250 MSPS, JESD204B, Dual ADC (Rev 0)
Application NoteADI: Application Note (AN-835) for Understanding ADC Testing and Evaluation
Application NoteADI: Application Note (AN-877) for Interfacing to High Speed ADCs via SPI

 

Design Elements

 

TypeDescription
SchematicsADI: Schematics for AD9250/AD6673 Evaluation Board
LayoutADI: Layout File for AD9250/AD6673 Evaluation Board
Application LibraryADI: Application Library for AD9250 Evaluation Setup Files (MCS file)
Application LibraryADI: Application Library for AD9250 Evaluation Setup Files (SPI Controller Macro File)
Reference DesignADI: Reference Design for AD9250 Evaluation Board, ADC-FMC Interposer and Xilinx KC705
Reference DesignADI: Reference Design for AD9250-FMC-250EBZ Boards and Xilinx
Simulation ModelADI: IBIS Model for AD9250
CAD ModelADI: CAD Model for AD9250BCPZ-250 (BXL File Format

 

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Kit Features


 

Features of AD9250-250EBZAD9250-250EBZ AD9250AD9250 Evaluation Board:

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  • Full featured evaluation board for the AD9250AD9250
  • SPI interface for setup and control
  • Balun/transformer or amplifier input drive option

  • On-board LDO regulator needing a single external 6V, 2 A dc supply

  • VisualAnalogRegistered and SPI controller software interfaces

 

Features of AD9250AD9250 Dual Analog-to-Digital Converter:

  • JESD204B Subclass 0 or Subclass 1 coded serial digital outputs
  • Signal-to-noise ratio (SNR) = 70.6 dBFS at 185 MHz AIN and 250 MSPS
  • Spurious-free dynamic range (SFDR) = 88 dBc at 185 MHz AIN and 250 MSPS
  • Total power consumption: 711 mW at 250 MSPS
  • 1.8 V supply voltages
  • Integer 1-to-8 input clock divider
  • Sample rates of up to 250 MSPS
  • IF sampling frequencies of up to 400 MHz
  • Internal analog-to-digital converter (ADC) voltage reference
  • Flexible analog input range
    • 1.4 V p-p to 2.0 V p-p (1.75 V p-p nominal)
  • ADC clock duty cycle stabilizer (DCS)
  • 95 dB channel isolation/crosstalk
  • Serial port control
  • Energy saving power-down modes
  • User-configurable, built-in self-test (BIST) capability

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Kit Contents


 

The Analog Devices AD9250-250EBZAD9250-250EBZ supplied with below contents:

 

  • AD9250-250EBZAD9250-250EBZ AD9250AD9250 Evaluation Board

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