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Documents Analog Devices: CN0243 Reference Design for High Dynamic Range RF Transmitter Signal Chain
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  • Author Author: atomar
  • Date Created: 7 Mar 2013 4:05 AM Date Created
  • Last Updated Last Updated: 27 Oct 2013 5:57 AM
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Analog Devices: CN0243 Reference Design for High Dynamic Range RF Transmitter Signal Chain

BUY NOWBUY NOWDevelopment ToolsTechnical DocumentsVideoFeaturesKit Contents

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Kit Overview

 

The combination of the ADRF6702ADRF6702 IQ modulator and the AD9122AD9122 16-bit dual 1.2 GSPS TxDAC has the dynamic range necessary for a modern high level QAM or OFDM based wireless transmitter. The dynamic range of this circuit (EVAL-CN0243-EB1ZEVAL-CN0243-EB1Z) is good enough to enable both ZIF (zero IF/ baseband) and CIF (complex IF up to 200 MHz to 300 MHz). The AD9122 has the option of up to 8× interpolation, as well as a 32-bit NCO for very fine IF frequency selectivity.

 

The ADRF6702ADRF6702 includes an on-board fractional PLL for LO generation so that a low frequency reference (typically less than 100 MHz) is all that is necessary to synthesize the IQ modulator LO. Using the PLL in the AD9516-4BCPZAD9516-4BCPZ clock generator allows a single reference to generate both the DAC sample clock and the PLL reference for the ADRF6702.

 

The circuit was built using the AD9516-0AD9516-0, but other members of the AD9516-4BCPZAD9516-4BCPZ family could be used depending on the desired internal VCO frequency.

 

The ADRF6702ADRF6702 IQ modulator is a unique device in several respects. In addition to its exceptional dynamic range, it also includes a fractional-N PLL, which allows programming of discrete LO frequency steps of less than 25 kHz while at the same time keeping the overall frequency multiplication small enough to avoid a large increase in phase noise from the reference to the synthesizer output.

 

Key Applications: Communications

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Developement Tools


Hardware Tools

  • 5 V power supply
  • Low phase noise reference source (10 MHz to 200 MHz range @ +3 dBm), Rohde & Schwarz SMA100, low noise option, or equivalent
  • DPG2 Digital Pattern Generator from Analog Devices
  • High dynamic range spectrum analyzer, Agilent E4440A or equivalent
  • Analog Devices EVAL-ADF4XXXZ USB Adapter

 

Software Tools

  • DPG2 Software (included with DPG)
  • ADRF6702 software

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Technical Documents


Learning Center

 

TypeDescription
User Guide

ADI: User Guide (CN-0243) for High Dynamic Range RF Transmitter Signal Chain Using Single External Frequency Reference for DAC Sample Clock and IQ Modulator

DatasheetADI: Datasheet for ADRF6702 1200 MHz to 2400 MHz Quadrature Modulator with 1550 MHz to 2150 MHz Frac-N PLL and Integrated VCO (Rev B)
DatasheetADI: Datasheet for AD9122 - Dual, 16-Bit, 1230 MSPS, TxDAC+ Digital-to-Analog Converter (Rev B, 05/2011)
DatasheetADI: Datasheet for AD9516-0 - 14-Output Clock Generator with Integrated 2.8 GHz VCO (Rev C, 02/2013)
Application NoteADI: Application Note (AN-1100) for Wireless Transmitter IQ Balance and Sideband Suppression

 

Design Elements

 

TypeDescription
SchematicsADI: Schematics File for EVAL-CN0243-EB1Z
LayoutADI: Layout File for EVAL-CN0243-EB1Z
BOMADI: BOM File for EVAL-CN0243-EB1Z
Simulation ModelADI: IBIS Model for AD9122

 

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Video


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Kit Features


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Key Feature for ADRF6702ADRF6702 are as below:

  • IQ modulator with integrated fractional-N PLL
  • Output frequency range: 1200 MHz to 2400 MHz
  • Internal LO frequency range: 1550 MHz to 2150 MHz
  • Output P1dB: 13.1 dBm @ 2140 MHz
  • Output IP3: 29.1 dBm @ 2140 MHz
  • Noise floor: −159.6 dBm/Hz @ 1960 MHz
  • Baseband bandwidth: 750 MHz (3 dB)
  • SPI serial interface for PLL programming
  • Integrated LDOs and LO buffer
  • Power supply: 5 V/240 mA

 

Key features for AD9122AD9122 are as below:

  • Flexible LVDS interface allows word, byte, or nibble load
  • Single-carrier W-CDMA ACLR = 82 dBc at 122.88 MHz IF
  • Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω
  • Integrated 2×/4×/8× interpolator/complex modulator allows
  • carrier placement anywhere in the DAC bandwidth Gain, dc offset, and phase adjustment for sideband suppression
  • Multiple chip synchronization interfaces High performance, low noise PLL clock multiplier
  • Digital inverse sinc filter Low power: 1.5 W at 1.2 GSPS, 800 mW at 500 MSPS, full operating conditions

 

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Kit Contents


 

The Analog Devices EVAL-CN0243-EB1ZEVAL-CN0243-EB1Z is supplied with below contents:

  • Evaluation Board

 

 

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